71M6543F-IGTR/F Maxim Integrated Products, 71M6543F-IGTR/F Datasheet - Page 68
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71M6543F-IGTR/F
Manufacturer Part Number
71M6543F-IGTR/F
Description
PMIC Solutions Precision Energy Meter IC
Manufacturer
Maxim Integrated Products
Type
Metering SoCr
Datasheet
1.71M6543F-DB.pdf
(157 pages)
Specifications of 71M6543F-IGTR/F
Core
8051
Core Architecture
8051
Data Bus Width
8 bit
Data Ram Size
5 KB
Device Million Instructions Per Second
5 MIPS
Interface Type
I2C, ICE, SPI, UART
Maximum Clock Frequency
5 MHz
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Programmable I/os
51
Number Of Timers
2
On-chip Adc
22 bit
Operating Supply Voltage
3 V to 3.6 V
Package / Case
LQFP-100
Processor Series
8051
Program Memory Size
64 KB
Program Memory Type
Flash
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
71M6543F-IGTR/F
Manufacturer:
Maxim Integrated
Quantity:
10 000
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71M6543F/H and 71M6543G/GH Data Sheet
2.5.12 SPI Slave Port
The slave SPI port communicates directly with the MPU data bus and is able to read and write Data RAM
and Configuration RAM (I/O RAM) locations. It is also able to send commands to the MPU. The interface
to the slave port consists of the SPI_CSZ, SPI_CKI, SPI_DI and SPI_DO pins. These pins are multiplexed
with the combined DIO/LCD segment driver pins SEGDIO36 to SEGDIO39 (pins 3, 2, 1 and 100).
Additionally, the SPI interface allows flash memory to be read and to be programmed. To facilitate flash
programming, cycling power or asserting RESET causes the SPI port pins to default to SPI mode. The
SPI port is disabled by clearing the SPI_E bit (I/O RAM 0x270C[4]).
Possible applications for the SPI interface are:
68
SDATA output Z
SDATA (output)
EECTRL Byte Written
SCLK (output)
Write -- With HiZ and WFR
Write -- No HiZ
BUSY (bit)
SDATA output Z
SDATA output Z
SDATA (input)
EECTRL Byte Written
SCLK (output)
SDATA output Z
SDATA (output)
SDATA (out/in)
EECTRL Byte Written
SCLK (output)
EECTRL Byte Written
SCLK (output)
Write -- With HiZ
BUSY (bit)
BUSY (bit)
BUSY (bit)
READ
Figure 22: 3-wire Interface. Write Command when HiZ=1 and WFR=1.
Figure 21: 3-Wire Interface. Write Command when CNT=0
D7
INT5 not issued
Figure 19: 3-wire Interface. Write Command, HiZ=1
© 2008–2011 Teridian Semiconductor Corporation
Figure 20: 3-wire Interface. Read Command.
(LoZ)
D7
D7
CNT Cycles (0 shown)
D7
D6
D6
D6
CNT Cycles (8 shown)
(From 6520)
CNT Cycles (6 shown)
CNT Cycles (6 shown)
(HiZ)
(LoZ)
(LoZ)
D5
D5
D5
SDATA output Z
SDATA (output)
EECTRL Byte Written
SCLK (output)
D4
BUSY (bit)
Write -- HiZ
D4
D4
D3
D3
D3
D2
D2
INT5 not issued
D2
INT5
(From EEPROM)
(HiZ)
(HiZ)
(HiZ)
BUSY
D1
CNT Cycles (0 shown)
D0
INT5
READY
INT5
v1.2
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