CAT1024ZI42 ON Semiconductor, CAT1024ZI42 Datasheet - Page 6

no-image

CAT1024ZI42

Manufacturer Part Number
CAT1024ZI42
Description
Supervisory Circuits 2K bit 4.2V Ind Temp
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT1024ZI42

Number Of Voltages Monitored
5
Monitored Voltage
3 V, 3.3 V, 5 V
Undervoltage Threshold
4.25 V to 4.5 V
Output Type
Open Collector / Drain
Manual Reset
Resettable
Watchdog
No Watchdog
Power-up Reset Delay (typ)
200 mS
Supply Voltage (max)
5 V, 3.3 V, 3 V
Supply Voltage (min)
2.7 V
Supply Current (typ)
3000 uA
Maximum Power Dissipation
1000 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
MSOP-8
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
CAT1024, CAT1025
RESET CIRCUIT AC CHARACTERISTICS
POWER-UP TIMING
AC TEST CONDITIONS
RELIABILITY CHARACTERISTICS
Notes:
(1) Test Conditions according to “AC Test Conditions” table.
(2) Power-up, Input Reference Voltage V
(3) Power-Down, Input Reference Voltage V
(4) V
(5) This parameter is characterized initially and after a design or process change that affects the parameter. Not 100% tested.
(6) t
(7) Latch-up protection is provided for stresses up to 100 mA on input and output pins from -1 V to V
Doc. No. MD-3008 Rev. R
Parameter
Input Pulse Voltages
Input Rise and Fall Times
Input Reference Voltages
Output Reference Voltages
Output Load
Symbol
MR Glitch
I
N
V
Symbol
LTH
T
Symbol
t
PUR
t
END
ZAP
GLITCH
DR
CC
PURST
t
t
t
MRW
MRD
RDP
t
(5)(7)
t
PUW
PUR
(5)
Glitch Reference Voltage = V
and t
(5)
(5)
PUW
Parameter
Endurance
Data Retention
ESD Susceptibility
Latch-Up
are the delays required from the time V
Parameter
Power-Up Reset Timeout
V
V
Manual Reset Glitch Immunity
MR Pulse Width
MR Input to RESET Output Delay
TH
CC
Parameter
Power-Up to Read Operation
Power-Up to Write Operation
to RESET Output Delay
Glitch Reject Pulse Width
(5), (6)
THmin
CC
; Based on characterization data
= V
CC
MIL-STD-883, Test Method 1033
= V
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
TH
Current Source: I
, Reset Output Reference Voltage and Load according to “AC Test Conditions” Table
TH
Reference Test Method
, Reset Output Reference Voltage and Load according to “AC Test Conditions” Table
JEDEC Standard 17
CC
is stable until the specified memory operation can be initiated.
0.2 x V
0.3 x V
Test Conditions
Test Conditions
0.5 x V
Test Conditions
CC
6
10 ns
CC
OL
to 0.8 x V
, 0.7 x V
Note 4, 5
= 3 mA; C
Note 1
Note 2
Note 3
Note 1
Note 1
CC
CC
CC
L
= 100 pF
1,000,000
Min
130
Min
2000
5
Min
100
100
CC
+ 1 V.
Characteristics subject to change without notice
Typ
200
Typ
Max
© 2009 SCILLC. All rights reserved.
Max
270
100
Max
270
270
30
5
1
Cycles/Byte
Years
Units
Volts
mA
Units
Units
ms
ms
µs
ns
µs
µs
ms
ns

Related parts for CAT1024ZI42