ISL4270EIRZ Intersil, ISL4270EIRZ Datasheet - Page 11

• Manufacturer Part Number: ISL4270EIRZ
• Description: IC 3DRVR/3RCVR RS232 3V 32-QFN
• Manufacturer: Intersil
• Type: Transceiverr

Specifications of ISL4270EIRZ

• Number Of Drivers/receivers: 3/3
• Protocol: RS232
• Voltage - Supply: 3 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

±15kV ESD Protection
All pins on the 3V interface devices include ESD protection
structures, but the ISL4270E incorporates advanced
structures which allow the RS-232 pins (transmitter outputs
and receiver inputs) to survive ESD events up to ±15kV. The
RS-232 pins are particularly vulnerable to ESD damage
because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can cause an ESD event that
might destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, protect
without allowing any latchup mechanism to activate, and
don’t interfere with RS-232 signals as large as ±25V.
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5kΩ current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330Ω limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to ±15kV.
Typical Performance Curves
FIGURE 12. TRANSMITTER OUTPUT VOLTAGE vs LOAD
-2.0
-4.0
-6.0
6.0
4.0
2.0
0
0
1 TRANSMITTER AT 250kbps
OTHER TRANSMITTERS AT 30kbps
CAPACITANCE
1000
LOAD CAPACITANCE (pF)
2000
11
3000
V
CC
4000
= V
V
V
OUT
L
OUT
= 3.3V, T
+
-
5000
ISL4270E
A
= 25
o
C
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely to
suffer an ESD event are those that are exposed to the outside
world (the RS-232 pins in this case), and the IC is tested in its
typical application configuration (power applied) rather than
testing each pin-to-pin combination. The lower current limiting
resistor coupled with the larger charge storage capacitor yields
a test that is much more severe than the HBM test. The extra
ESD protection built into this device’s RS-232 pins allows the
design of equipment meeting level 4 criteria without the need
for additional board level protection on the RS-232 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the IC
pin until the voltage arcs to it. The current waveform delivered
to the IC pin depends on approach speed, humidity,
temperature, etc., so it is difficult to obtain repeatable results.
The “E” device RS-232 pins withstand ±15kV air-gap
discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-232 pins.
30
25
20
15
10
5
FIGURE 13. SLEW RATE vs LOAD CAPACITANCE
0
1000
-SLEW
LOAD CAPACITANCE (pF)
2000
+SLEW
3000
4000
June 16, 2010
FN6041.2
5000