PI90LV386AE Pericom Semiconductor, PI90LV386AE Datasheet
PI90LV386AE
Manufacturer Part Number
PI90LV386AE
Description
IC 16 DIFF LINE RCVR 3ST 64TSSOP
Manufacturer
Pericom Semiconductor
Type
Line Receiverr
Datasheet
1.PI90LVT386AE.pdf
(8 pages)
Specifications of PI90LV386AE
Number Of Drivers/receivers
0/16
Protocol
LVDS
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
64-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Pin Configuration
Features
• Sixteen line receivers meet or exceed the requirements of the
• Designed for signaling rates up to 660 Mbps
• 0V to 3V common-mode input voltage range
• Operates from a single 3.3V supply
• Typical propagation delay time: 2.6ns
• Output skew 100ps (typical)
• Part-to-part skew is less than 1ns
• Integrated 110-Ohm termination on PI90LVT386
• Low Voltage TTL (LVTTL) levels are 5V tolerant
• Open-circuit fail safe
• Flow-through pin out
• Packaging (Pb-free & Green available):
ANSI TIA/EIA-644-1995 Standard
- 64-Pin Thin Shrink Small Output TSSOP (A)
08-0295
1R IN1+
1R IN1–
1R IN2+
1R IN2–
1R IN3+
1R IN3–
1R IN4+
1R IN4–
2R IN1+
2R IN1–
2R IN2–
2R IN2–
2R IN3+
2R IN3–
2R IN4+
2R IN4–
3R IN1+
3R IN1–
3R IN2+
3R IN2–
3R IN3+
3R IN3–
3R IN4+
3R IN4–
4R IN1+
4R IN1–
4R IN2+
4R IN2–
4R IN3+
4R IN3–
4R IN4+
4R IN4–
16 Receivers
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64-Pin
A
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
GND
V CC
V CC
GND
EN1
1R OUT1
1R OUT2
1R OUT3
1R OUT4
EN2
2R OUT1
2R OUT2
2R OUT3
2R OUT4
GND
V CC
V CC
GND
3R OUT1
3R OUT2
3R OUT3
3R OUT4
EN3
4R OUT1
4R OUT2
4R OUT3
4R OUT4
EN4
GND
V CC
V CC
GND
1
Description
The PI90LVx386 family consists of sixteen differential line receivers
with 3-state outputs that implement Low-Voltage Differential
Signaling (LVDS). Any of the differential receivers will provide a
valid logical output state with a ±100mV differential input voltage
within the input common-mode voltage range that allows 0 to 3V of
ground potential difference between two LVDS nodes. The indepen-
dent EN pins can be used to place the outputs in either a normal logic
state (high or low logic levels) or a high-impedance state. In high-
impedance state, outputs neither load nor drive the bus lines.
The intended application of these devices, and their signaling
techniques, is for point-to-point baseband data transmission over
controlled impedance media of approximately 100-ohms with a
100-Ohm termination resistor. The PI90LVT386 integrates the termi-
nating resistors while the PI90LV386 requires external resistors.
The transmission media may be printed circuit board traces,
backplanes, or cables. The PI90LV386’s 16 receivers integrated into
the same substrate allow precise timing alignment.
These parts are characterized for operation from –40°C to 85°C.
Block Diagram
High-Speed Differential Line Receivers
PI90LV386/PI90LVT386
PS8574D
11/11/08
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PI90LV386AE Summary of contents
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... Controlling dimensions in millimeters. 3. Ref: JEDEC MO-153F/EF 4. Package Outline Exclusive of Mold Flash and Metal Burr Ordering Information Ordering Code PI90LV386AE PI90LVT386AE Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging Tape and reel Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 08-0295 ...