PSB21150FV14NP Lantiq, PSB21150FV14NP Datasheet - Page 112

• Manufacturer Part Number: PSB21150FV14NP
• Manufacturer: Lantiq

Specifications of PSB21150FV14NP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

3.7.2
For timeslot oriented standard devices connected to the IOM-2 interface the IPAC-X
provides two independent data strobe signals SDS1 and SDS2. Instead of a data strobe
signal a strobed IOM-2 bit clock can be provided on pin SDS1 and SDS2.
3.7.2.1
The two strobe signals can be generated with every 8-kHz frame and are controlled by
the registers SDS1/2_CR. By programming the TSS bits and three enable bits
(ENS_TSS, ENS_TSS+1, ENS_TSS+3) a data strobe can be generated for the IOM-2
time slots TS, TS+1 and TS+3 and any combination of them.
The data strobes for TS and TS+1 are always 8 bits long (bit7 to bit0) whereas the data
strobe for TS+3 is always 2 bits long (bit7, bit6).
Figure 63
SDS is active during channel B2 on IOM-2 whereas in the second example during IC2
and MON1. The third example shows a strobe signal for 2B+D channels which can be
used e.g. for an IDSL (144kbit/s) transmission.
Data Sheet
shows three examples for the generation of a strobe signal. In example 1 the
Serial Data Strobe Signal and Strobed Data Clock
Serial Data Strobe Signal
112
Description of Functional Blocks
PSB/PSF 21150
2003-01-30
IPAC-X