PSB21150FV14NP Lantiq, PSB21150FV14NP Datasheet - Page 63
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PSB21150FV14NP
Manufacturer Part Number
PSB21150FV14NP
Description
Manufacturer
Lantiq
Datasheet
1.PSB21150FV14NP.pdf
(270 pages)
Specifications of PSB21150FV14NP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant
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Protection Circuit for Transmitter
Figure 32
Figure 32
The external resistors (5 ... 10 W ) are required in order to adjust the output voltage to the
pulse mask on the one hand and in order to meet the output impedance of minimum 20 W
(transmission of a binary zero according to ITU-T I.430) on the other hand.
Two mutually reversed diode paths protect the device against positive or negative
overvoltages on both lines.
An ideal protection circuit should limit the voltage at the SX pins from – 0.4 V to V
+ 0.4 V. With the circuit In
V
becoming active if the 96 kHz test signal is applied while no supply voltage is present.
Protection Circuit for Receiver
Figure 33
receiver. Protection of symmetrical receivers is rather simple.
Data Sheet
DD
+ 1.4 V. The resulting forward voltage of 1.4 V will prevent the protection circuit from
illustrates the secondary protection circuit recommended for the transmitter.
illustrates the external circuitry used in combination with a symmetrical
SX1
SX2
External Circuitry for Transmitter
Figure 32
5 ... 10
5 ...10
Ohm
Ohm
the pin voltage range is increased from – 0.7 V to
63
Vdd
Description of Functional Blocks
1:1
21150_23
S Bus
PSB/PSF 21150
2003-01-30
IPAC-X
DD
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