K4S641632N-LC75000 Samsung Semiconductor, K4S641632N-LC75000 Datasheet

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K4S641632N-LC75000

Manufacturer Part Number
K4S641632N-LC75000
Description
Manufacturer
Samsung Semiconductor
Type
SDRAMr
Datasheet

Specifications of K4S641632N-LC75000

Organization
4Mx16
Density
64Mb
Address Bus
14b
Access Time (max)
6/4.5ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
110mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
K4S640832N
K4S641632N
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE
CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHER-
WISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOL-
OGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS" BASIS WITHOUT
GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
* Samsung Electronics reserves the right to change products or specification without notice.
applications where Product failure could result in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
64Mb N-die SDRAM Specification
with Lead-Free and Halogen-Free
(RoHS compliant)
54 TSOP-II
1 of 15
Synchronous DRAM
Rev. 1.12 August 2008

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K4S641632N-LC75000 Summary of contents

Page 1

... K4S640832N K4S641632N 64Mb N-die SDRAM Specification with Lead-Free and Halogen-Free INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHER- WISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOL- OGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS " ...

Page 2

... K4S640832N K4S641632N Table of Contents 1.0 Features ........................................................................................................................................ 4 2.0 General Description ..................................................................................................................... 4 3.0 Ordering Information ................................................................................................................... 4 4.0 Package Physical Dimension ...................................................................................................... 5 5.0 Functional Block Diagram............................................................................................................ 6 6.0 Pin Configuration (Top view) ....................................................................................................... 7 7.0 Input/Output Function Description ............................................................................................. 7 8.0 Absolute Maximum Ratings ........................................................................................................ 8 9.0 DC Operating Conditions ............................................................................................................. 8 10.0 Capacitance................................................................................................................................. 8 11.0 DC Characteristics ..................................................................................................................... 9 12.0 AC Operating Test Conditions................................................................................................. 11 13 ...

Page 3

... K4S640832N K4S641632N Revision History Revision Month Year 1.0 December 2007 1.1 December 2007 1.11 March 2008 1.12 August 2008 - Release SPEC revision 1.0 - Revised ICC6 SPEC of lowpower - Added Package pin out lead width - Corrected typo and format Synchronous DRAM History Rev. 1.12 August 2008 ...

Page 4

... RoHS compliant 2.0 General Description The K4S640832N / K4S641632N is 67,108,864 bits synchronous high data rate Dynamic RAM organized 2,097,152 words by 8 bits 1,048,576 words by 16 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high perfor- mance memory system applications ...

Page 5

... K4S640832N K4S641632N 4.0 Package Physical Dimension #54 #1 (1.50) 0.80TYP (0.71) [0.80 0.08] ± NOTE REFERENCE Detail ASS’Y OUT QUALITY #28 #27 22.22 0.10 ± (10°) (10°) Detail A Detail B Detail B +0.10 +0.10 0.30 0.35 - 0.05 - 0.05 54Pin TSOP(II) Package Dimension Synchronous DRAM +0 ...

Page 6

... K4S640832N K4S641632N 5.0 Functional Block Diagram Bank Select CLK ADD LCKE LRAS LCBR CLK CKE Samsung Electronics reserves the right to change products or specification without notice. * Data Input Register Column Decoder Latency & Burst Length Programming Register LWE LCAS Timing Register CS RAS ...

Page 7

... K4S640832N K4S641632N 6.0 Pin Configuration (Top view) x16 V DD DQ0 V DDQ DQ1 DQ2 V SSQ DQ3 DQ4 V DDQ DQ5 DQ6 V SSQ DQ7 V DD LDQM WE CAS RAS CS BA0 BA1 A10/AP A10/ 7.0 Input/Output Function Description Pin Name CLK System clock CS Chip select CKE ...

Page 8

... K4S640832N K4S641632N 8.0 Absolute Maximum Ratings Parameter Voltage on any pin relative Voltage on V supply relative Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if "ASOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. ...

Page 9

... K4S640832N K4S641632N 11.0 DC Characteristics (x8) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active CC2 Precharge standby current in power-down mode PS CKE & CLK ≤ CC2 I N CC2 Precharge standby current in non power-down mode I NS CC2 I P CC3 ...

Page 10

... Refresh current I CC5 Self refresh current I CC6 Notes : 1. Measured with outputs open. 2. Refresh period is 64ms. 3. K4S641632N-LC 4. K4S641632N-LL 5. Unless otherwise noted, input swing IeveI is CMOS 70°C for x16 only) A Test Condition Burst length = 1 tRC ≥ tRC(min CKE ≤ (max), tCC = 10ns IL CKE & ...

Page 11

... K4S640832N K4S641632N 12.0 AC Operating Test Conditions Parameter AC input levels ( Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition 3.3V 1200Ω Output 30pF 870Ω (Fig output load circuit 13.0 Operating AC Parameter ...

Page 12

... K4S640832N K4S641632N 14.0 AC Characteristics Parameter CAS latency=3 CLK cycle time CAS latency=2 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=3 Output data hold time CAS latency=2 CLK high pulse width CLK low pulse width Input setup time Input hold time ...

Page 13

... K4S640832N K4S641632N 16.0 IBIS SPecification I Characteristics (Pull-up) OH 200MHz/133MHz 200MHz/133MHz Voltage Min (V) I (mA) 3.45 - 3.30 - 3.00 -0.35 2.70 -3.75 2.50 -6.65 1.95 -13.75 1.80 -17.75 1.65 -20.55 1.50 -23.55 1.40 -26.2 1.00 -36.25 0.20 -46.5 I Characteristics (Pull-down) OL 200MHz/133MHz 200MHz/133MHz Voltage Min (V) I (mA) 3 ...

Page 14

... K4S640832N K4S641632N V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) DD 0.0 0.0 0.2 0.0 0.4 0.0 0.6 0.0 0.7 0.0 0.8 0.0 0.9 0.0 1.0 0.23 1.2 1.34 1.4 3.02 1.6 5.06 1.8 7.35 2.0 9.83 2.2 12.48 2.4 15.30 2.6 18.31 V Clamp @ CLK, CKE, CS, DQM & ...

Page 15

... K4S640832N K4S641632N 17.0 Simplified Truth Table Command Register Mode register set Auto refresh Entry Refresh Self refresh Exit Bank active & row addr. Read & Auto precharge disable column address Auto precharge enable Write & Auto precharge disable column address Auto precharge enable ...

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