MAX13041ASD+T Maxim Integrated Products, MAX13041ASD+T Datasheet - Page 9
![IC CAN TXRX +/-80V HS 14-SOIC](/photos/6/57/65727/175-14-soic_sml.jpg)
MAX13041ASD+T
Manufacturer Part Number
MAX13041ASD+T
Description
IC CAN TXRX +/-80V HS 14-SOIC
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet
1.MAX13041ASD.pdf
(20 pages)
Specifications of MAX13041ASD+T
Number Of Drivers/receivers
1/1
Protocol
CAN
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
±80V Fault-Protected High-Speed CAN Transceiver
with Low-Power Management and Wake-On CAN
PIN
10
11
12
13
14
1
2
3
4
5
6
7
8
9
NAME
WAKE
CANH
SPLIT
CANL
GND
V
RXD
TXD
V
ERR
V
INH
STB
_______________________________________________________________________________________
EN
BAT
CC
I/O
Data Transmit Input, CMOS Compatible. TXD is internally pulled up to V
Ground
Supply Voltage +4.75V to +5.25V. Bypass V
possible to the device.
Data Receive Output, CMOS Compatible
Supply Voltage for I/O Level Translation, +2.8V < V
V
Enable Input. Control the operating mode by driving EN logic-high or logic-low (see Table 1 and
Figure 4.)
Inhibit Output. INH controls one or more external voltage regulators.
Error Output, Active Low. ERR indicates errors and displays status of internal flags.
Local Wake-Up Input. Present a voltage transition on WAKE to generate a local wake-up event.
Battery Voltage Input. Bypass V
the device.
Split Termination Voltage Output. Connect SPLIT to the center node of two 60Ω termination resistors
to provide common-mode voltage stabilization (see Figure 3). SPLIT outputs a voltage of V
Low-Level CAN Differential Bus Line
High-Level CAN Differential Bus Line
Standby Input, Active Low. Drive STB logic-high or logic-low to control the operating mode (see Table
1 and Figure 4.)
I/O
to ground with a 0.1µF ceramic capacitor as close as possible to the device.
BAT
to ground with a 0.1µF ceramic capacitor as close as possible to
CC
FUNCTION
to ground with a 0.1µF ceramic capacitor as close as
I/O
< V
CC
(see the Level Shifting section). Bypass
I/O
.
Pin Description
CC
/2.
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