ISL9444IRZ-T7A Intersil, ISL9444IRZ-T7A Datasheet - Page 4

• Manufacturer Part Number: ISL9444IRZ-T7A
• Description: ISL9444 Triple, Step- Down PWM Controller IMVP-6. 40 Ld MLFP
• Manufacturer: Intersil
• Series: -r

Specifications of ISL9444IRZ-T7A

• Pwm Type: Current Mode
• Number Of Outputs: 3
• Frequency - Max: 1.32MHz
• Duty Cycle: -
• Voltage - Supply: 4.5 V ~ 28 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-VFQFN Exposed Pad
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Pin Descriptions
PIN
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
-
PHASE3
PHASE2
PHASE1
UGATE3
LGATE3
CLKOUT
UGATE2
LGATE2
LGATE1
UGATE1
BOOT3
BOOT2
BOOT1
NAME
ISEN3
PGND
ISEN2
ISEN1
EPAD
Current signal input for PWM3. This pin is used to monitor the voltage drop across the lower MOSFET for current loop
feedback and overcurrent protection.
Phase node connection for PWM3. This pin is connected to the junction of the upper MOSFET’s source, output filter inductor,
and lower MOSFET’s drain. PHASE3 is the internal lower supply rail for the UGATE3.
Bootstrap pin to provide bias for PWM3 high-side driver. The positive terminal of the bootstrap capacitor connects to this
pin. The bootstrap diodes are integrated to help reduce total cost and reduce layout complexity.
High-side MOSFET gate driver output for PWM3.
Low-side MOSFET gate driver output for PWM3.
Power ground connection for all three PWM channels. This pin should be connected to the sources of the lower MOSFETs
and the (-) terminals of the external input capacitors
Clock signal output. The frequency of the clock signal is two times of the ISL9444 switching frequency set by the resistor
from RT to ground.
Current signal input for PWM2. This pin is used to monitor the voltage drop across the lower MOSFET for current loop
feedback and overcurrent protection.
Phase node connection for PWM2. This pin is connected to the junction of the upper MOSFET’s source, output filter inductor,
and lower MOSFET’s drain. PHASE2 is the internal lower supply rail for the UGATE2.
Bootstrap pin to provide bias for PWM2 high-side driver. The positive terminal of the bootstrap capacitor connects to this
pin. The bootstrap diodes are integrated to help reduce total cost and reduce layout complexity.
High-side MOSFET gate driver output for PWM2.
Low-side MOSFET gate driver output for PWM2.
Low-side MOSFET gate driver output for PWM1.
High-side MOSFET gate driver output for PWM1.
Bootstrap pin to provide bias for PWM1 high-side driver. The positive terminal of the bootstrap capacitor connects to this
pin. The bootstrap diodes are integrated to help reduce total cost and reduce layout complexity.
Phase node connection for PWM1. This pin is connected to the junction of the upper MOSFET’s source, output filter inductor,
and lower MOSFET’s drain. PHASE1 is the internal lower supply rail for the UGATE1.
Current signal input for PWM1. This pin is used to monitor the voltage drop across the lower MOSFET for current loop
feedback and overcurrent protection.
EPAD at ground potential. Solder it directly to GND plane for better thermal performance.
4
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ISL9444
FUNCTION
July 19, 2011
FN7665.1