PIC32MX440F512HT-80V/MR Microchip Technology, PIC32MX440F512HT-80V/MR Datasheet - Page 204

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PIC32MX440F512HT-80V/MR

Manufacturer Part Number
PIC32MX440F512HT-80V/MR
Description
512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet

Specifications of PIC32MX440F512HT-80V/MR

Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-VFQFN Exposed Pad
Core
MIPS
Processor Series
PIC32MX4xx
Data Bus Width
32 bit
Maximum Clock Frequency
80 MHz
Data Ram Size
32 KB
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Mounting Style
SMD/SMT
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Operating Temperature
+ 105 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC32MX3XX/4XX
TABLE A-1:
DS61143H-page 204
Section 26.0 “Special Features” Modified bit names and locations in Register 26-5 “DEVID: Device and
Section 29.0 “Electrical
Characteristics”
Section 30.0 “Packaging
Information”
“Product Identification System” Added the MR package designator for the 64-Lead (9x9x0.9) QFN.
Section Name
MAJOR SECTION UPDATES (CONTINUED)
Revision ID Register”.
Replaced “T
Section 26.3.1 “On-Chip Regulator and POR”.
The information that appeared in the Watchdog Timer and the Programming and
Diagnostics sections of 61143E version of this data sheet has been incorporated
into the Special Features section:
• Section 26.2 “Watchdog Timer (WDT)”
• Section 26.4 “Programming and Diagnostics”
Added the 64-Lead QFN package to Table 29-3.
Updated data in Table 29-5.
Updated data in Table 29-7.
Updated data in Table 29-4, Table 29-5, Table 29-7 and Table 29-8.
Updated data in Table 29-11.
Added OS42 parameter to Table 29-17.
Replaced Table 29-23.
Replaced Table 29-24.
Replaced Table 29-25.
Updated Table 29-36.
Added 64-Lead QFN package marking information to Section 30.1 “Package
Marking Information”.
Added the 64-Lead QFN (MR) package drawing and land pattern to
Section 30.2 “Package Details”.
STARTUP
” with “T
PU
Update Description
”, and “64-ms nominal delay” with “T
© 2011 Microchip Technology Inc.
PWRT
”, in

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