PIC32MX440F512HT-80V/MR Microchip Technology, PIC32MX440F512HT-80V/MR Datasheet - Page 74

• Manufacturer Part Number: PIC32MX440F512HT-80V/MR
• Description: 512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512HT-80V/MR

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-VFQFN Exposed Pad
• Core: MIPS
• Processor Series: PIC32MX4xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 80 MHz
• Data Ram Size: 32 KB
• Number Of Programmable I/os: 5
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Mounting Style: SMD/SMT
• Interface Type: USB, I2C, UART, RS-232, RS-485, SPI
• Maximum Operating Temperature: + 105 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 4-29:
TABLE 4-30:
Legend:
Note
Legend:
Note
6140
6150
6160
6170
6140
6150
6160
6170
1:
1:
PORTF
PORTF
TRISF
ODCF
TRISF
ODCF
LATF
LATF
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
PORTF REGISTERS MAP FOR PIC32MX320F128L, PIC32MX340F128L, PIC32MX360F256L AND PIC32MX360F512L DEVICES
ONLY
PORTF REGISTERS MAP FOR PIC32MX440F128L, PIC32MX460F256L AND PIC32MX460F512L DEVICES ONLY
31/15
31/15
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(1)
30/14
30/14
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TRISF13
ODCF13
TRISF13
ODCF13
LATF13
LATF13
29/13
29/13
RF13
RF13
—
—
—
—
—
—
—
—
TRISF12
ODCF12
TRISF12
ODCF12
LATF12
LATF12
28/12
28/12
RF12
RF12
—
—
—
—
—
—
—
—
27/11
27/11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
26/10
26/10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
25/9
25/9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TRISF8
ODCF8
TRISF8
ODCF8
LATF8
LATF8
24/8
24/8
RF8
RF8
—
—
—
—
—
—
—
—
Bits
Bits
TRISF7
ODCF7
LATF7
23/7
23/7
RF7
—
—
—
—
—
—
—
—
—
—
—
—
TRISF6
ODCF6
LATF6
22/6
22/6
RF6
—
—
—
—
—
—
—
—
—
—
—
—
TRISF5
TRISF5
ODCF5
ODCF5
LATF5
LATF5
21/5
21/5
RF5
RF5
—
—
—
—
—
—
—
—
TRISF4
ODCF4
TRISF4
ODCF4
LATF4
LATF4
20/4
20/4
RF4
RF4
—
—
—
—
—
—
—
—
Section 12.1.1 “CLR, SET and INV Registers”
Section 12.1.1 “CLR, SET and INV Registers”
TRISF3
ODCF3
TRISF3
ODCF3
LATF3
LATF3
19/3
RF3
19/3
RF3
—
—
—
—
—
—
—
—
TRISF2
ODCF2
TRISF2
ODCF2
LATF2
LATF2
18/2
18/2
RF2
RF2
—
—
—
—
—
—
—
—
TRISF1
ODCF1
TRISF1
ODCF1
LATF1
LATF1
17/1
17/1
RF1
RF1
—
—
—
—
—
—
—
—
(1)
TRISF0
ODCF0
TRISF0
ODCF0
LATF0
LATF0
16/0
16/0
RF0
RF0
—
—
—
—
—
—
—
—
for more
for more
0000
31FF
0000
xxxx
0000
xxxx
0000
0000
0000
313F
0000
xxxx
0000
xxxx
0000
0000