PIC32MX440F512HT-80V/PT Microchip Technology, PIC32MX440F512HT-80V/PT Datasheet - Page 138

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PIC32MX440F512HT-80V/PT

Manufacturer Part Number
PIC32MX440F512HT-80V/PT
Description
512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 TQFP 10x10x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet

Specifications of PIC32MX440F512HT-80V/PT

Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-TQFP
Core
MIPS
Processor Series
PIC32MX4xx
Data Bus Width
32 bit
Maximum Clock Frequency
80 MHz
Data Ram Size
32 KB
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Mounting Style
SMD/SMT
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Operating Temperature
+ 105 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Quantity
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Part Number:
PIC32MX440F512HT-80V/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC32MX3XX/4XX
26.3
All PIC32MX3XX/4XX device’s core and digital logic
are designed to operate at a nominal 1.8V. To simplify
system
PIC32MX3XX/4XX incorporate an on-chip regulator
providing the required core logic voltage from V
The internal 1.8V regulator is controlled by the
ENVREG pin. Tying this pin to V
lator, which in turn provides power to the core. A low
ESR capacitor (such as tantalum) must be connected
to the V
maintain the stability of the regulator. The recom-
mended value for the filer capacitor is provided in
Section 29.1 “DC
Tying the ENVREG pin to V
this case, separate power for the core logic at a nomi-
nal 1.8V must be supplied to the device on the
V
Alternatively, the V
together to operate at a lower nominal voltage. Refer to
Figure 26-2
FIGURE 26-2:
DS61143H-page 138
CORE
Note:
Note 1:
/V
Regulator Enabled (ENVREG tied to V
(10 μF typ)
CORE
CAP
On-Chip Voltage Regulator
designs,
C
It is important that the low ESR capacitor
is placed as close as possible to the
V
for possible configurations.
EFC
pin.
These are typical operating voltages. Refer to
and V
CORE
/V
CAP
3.3V
CORE
CORE
/V
Characteristics”.
CAP
pin
CONNECTIONS FOR THE ON-CHIP REGULATOR
.
/V
most
pin.
(Figure
CAP
V
ENVREG
V
V
SS
DD
CORE
SS
PIC32MX
disables the regulator. In
and V
/V
DD
devices
26-2). This helps to
CAP
DD
enables the regu-
pins can be tied
DD
in
):
DD
.
the
Section 29.1 “DC Characteristics”
26.3.1
When the voltage regulator is enabled, it takes fixed
delay for it to generate output. During this time, desig-
nated as T
every time the device resumes operation after any
power-down, including Sleep mode.
If the regulator is disabled, a separate Power-up Timer
(PWRT) is automatically enabled. The PWRT adds a
fixed delay of T
Section 29.0 “Electrical Characteristics”
information on T
26.3.2
When
PIC32MX3XX/4XX devices also have a simple brown-
out capability. If the voltage supplied to the regulator is
inadequate to maintain a regulated level, the regulator
Reset circuitry will generate a Brown-out Reset. This
event is captured by the BOR flag bit (RCON<1>). The
brown-out voltage levels are specific in
“DC
26.3.3
The on-chip regulator is designed to meet the power-up
requirements for the device. If the application does not
use the regulator, then strict power-up conditions must
be adhered to. While powering up, V
exceed V
Regulator Disabled (ENVREG tied to ground):
Characteristics”.
1.8V
DD
the
PU
(1)
ON-CHIP REGULATOR AND POR
ON-CHIP REGULATOR AND BOR
POWER-UP REQUIREMENTS
by 0.3 volts.
, code execution is disabled. T
3.3V
PU AND
on-chip
PWRT
(1)
for the full operating ranges of V
T
© 2011 Microchip Technology Inc.
PWRT
V
ENVREG
V
V
DD
CORE
SS
at device start-up. See
regulator
PIC32MX
.
/V
CAP
CORE
is
Section 29.1
PU
must never
is applied
for more
enabled,
DD

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