MCIMX537CVV8C Freescale Semiconductor, MCIMX537CVV8C Datasheet - Page 32

• Manufacturer Part Number: MCIMX537CVV8C
• Description: IC, 32-BIT MPU, 800 MHz, 529-BGA
• Manufacturer: Freescale Semiconductor
• Series: ARM Cortex-A8r

Specifications of MCIMX537CVV8C

• Core Size: 32bit
• Program Memory Size: 288KB
• Cpu Speed: 1GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 529
• Operating Temperature Range: -20°C To +85°C
• Msl: MSL 3 - 168 Hours
• Lead Free Status / Rohs Status: Supplier Unconfirmed

1
2
3
1
2
Electrical Characteristics
4.3.2.3
The DDR3 interface fully complies with JESD79-3D DDR3 JEDEC standard release April, 2008. The
parameters in
32
Differential Input Logic High
Differential Input Logic Low
Input current (no pull-up/down)
240 Ohm unit calibration resolution
Keeper Circuit Resistance
Pull-up/Pull-down impedance Mismatch
High-level output voltage
Low-level output voltage
DC input Logic High
DC input Logic Low
Differential input Logic High
Differential input Logic Low
Over/undershoot peak
Over/undershoot area
(above OVDD or below OVSS)
Termination Voltage
Input current (no pull-up/down)
Pull-up/Pull-down impedance mismatch
240 Ω unit calibration resolution
Keeper Circuit Resistance
Note that the JEDEC LPDDR2 specification (JESD209_2B) supersedes any specification in this document.
The single-ended signals need to be within the respective limits (Vih(dc) max, Vil(dc) min) for single-ended signals as well as
the limitations for overshoot and undershoot.
Use an off-chip pull resistor of less than 60 kΩ to override this keeper.
OVDD – I/O power supply (1.425 V–1.575 V for DDR3)
Vref – DDR3
Parameters
DDR3 Mode I/O DC Parameters
external reference voltage
Table 14
Table 13. LPDDR2 I/O DC Electrical Parameters
i.MX53xD Applications Processors for Consumer Products, Rev. 3
are guaranteed per the operating ranges in
Table 14. DDR3 I/O DC Electrical Parameters
Vih(diff)
Vil(diff)
Iin
Symbol
VIH(diff)
VIL(diff)
VIH(dc)
VIL(dc)
Vpeak
Varea
Voh
Vol
Vtt
—
Iin
—
—
—
Minimum impedance
Vtt tracking OVDD/2
Test Conditions
Vin=OVDD
Vin = 0 V
configuration
VI=OVDD
VI = 0 V
—
—
—
—
—
—
—
—
—
—
—
See Note
0.26
-15
0.49*OVDD
0.8*OVDD
Table
—
—
—
See Note
Vref
OVSS
Min
1
0.2
—
—
—
—
—
—
—
—
2
2
+0.1
(continued)
7, unless otherwise noted.
3
1
140
—
—
130
Vref
Typ
—
—
—
—
—
—
—
—
—
—
—
3
—
4
Freescale Semiconductor
0.51*OVDD
See Note
0.2*OVDD
See Note
Vref-0.1
OVDD
-0.26
+15
Max
0.67
-0.2
10
—
0.4
10
—
—
1
1
1
1
3
2
3
Unit
Ohm
V x
nS
μA
kΩ
μA
kΩ
Ω
Ω
V
V
V
V
V
V
V
V
%