CS8952-CQ Cirrus Logic Inc, CS8952-CQ Datasheet - Page 67

• Manufacturer Part Number: CS8952-CQ
• Description: IC ETHNT 10/100 TXRX 5V 100-TQFP
• Manufacturer: Cirrus Logic Inc
• Type: Transceiverr

Specifications of CS8952-CQ

• Mounting Type: Surface Mount
• Protocol: MII
• Voltage - Supply: 4.75 V ~ 5.25 V
• Package / Case: 100-TQFP, 100-VQFP
• Peak Reflow Compatible (260 C): No
• Supply Voltage: 5V
• Supply Voltage Max: 5V
• Transceiver Type: Ethernet
• Leaded Process Compatible: No
• No. Of Drivers: 6
• Interface Type: MII
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
• Other names: 598-1205

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CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
ly) on both sides of the TX+/- traces.
No signal current carrying planes, i.e. no
ground or power plane, should be present un-
derneath the region between the transformer
secondary (network) side and the RJ-45. How-
ever, a chassis plane may be added in this re-
gion to pick up the metal tabs of a shielded RJ-
45. This chassis plane should be separated from
the ground and power planes by at least
50 mils. That is, all other ground and power
planes should be “cookie cuttered” so they are
voided in the area of the chassis plane. Gener-
ally speaking, parts should not cross the moat
except for the transformer.
Proper termination practices must be used with
all transmission lines, especially if sending and
receiving high speed signals on and off the
board. Series terminations must be kept close to
the source and load terminations close to the
load. Thus the TX_NRZ+/- termination com-
ponents must be kept close to the fiber optic
Assignment
CS8952 Pin
91 (RX+)
80 (TX+)
92 (RX-)
81 (TX-)
T1 Primary Pin
Assignment
15 (TX+)
16 (TX-)
1 (RX+)
2 (RX-)
Table 8. RJ-45 Wiring
Pin Assignment
T1 Secondary
11 (TX+)
10 (TX-)
7 (RX+)
6 (RX-)
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transceiver, and the RX_NRZ+/- and SIG-
NAL+/- termination components must be kept
close to the CS8952.
Locate the crystal as close to the CS8952 as
possible, running short traces on the component
side in order to reduce parasitic load capaci-
tance.
Add bulk capacitance at each connector where
power may be supplied. For example, MII pow-
er may be provided at the MII connector and at
a separate connector for test purposes. If so, and
the two connectors are not adjacent, then the
bulk capacitors should be duplicated in each lo-
cations.
Use wide traces to connect the “Bob Smith” ter-
mination resistors at T1 and the RJ-45 to the
2 KV capacitor or capacitors in order to mini-
mize their lead inductance.
Configuration
Adapter/NIC
3 (RD+)
2 (TD+)
1 (TD+)
6 (RD-)
RJ-45 Pin Assignment
Hub/Repeater
Configuration
1 (RD+)
3 (TD+)
2 (RD-)
6 (TD-)
CS8952
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