MC145572APB Freescale Semiconductor, MC145572APB Datasheet
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... Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC145572EVK ISDN U-Interface Transceiver Evaluation Kit This document contains information on a new product. SpeciÞcations and information herein are subject to change without notice. REV 2 11/97 For More Information On This Product, Advance Information Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. Paragraph Number SECTION 1 INTRODUCTION 1.1 ORGANIZATION OF DATA SHEET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Freescale Semiconductor, Inc. CONTENTS (Continued) Paragraph Number 3.2 COMMAND SET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1 ACT Ñ Activation/Deactivation Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.2 BRL Ñ Read/Write LT U-Interface Transceiver Byte Register . . . . . . . . 3.2.3 BRN Ñ Read/Write NT U-Interface Transceiver Byte Register . . . . . . . . 3.2.4 BRS Ñ Read/Write S/T-Interface Transceiver Register . . . . . . . . . . . . . ...
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... Freescale Semiconductor, Inc. Paragraph Number Figure 1-1. Motorola Silicon Applications and the MC145572EVK . . . . . . . . . . . . . . . . . Figure 1-2. MC145572EVK Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 1-3. MC145572EVK DIP Switch Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 1-4. External Connections to the MC145572EVK . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Freescale Semiconductor, Inc. 1.1 ORGANIZATION OF DATA SHEET This document is composed of three major sections. Section 1 introduces the MC145572EVK U-Interface Transceiver Evaluation Kit with a brief description of the evaluation board and a list of key features. Also included at the end of Section 1 is ÒGetting Started,Ó a short tutorial to help begin working with the MC145572EVK ...
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... Freescale Semiconductor, Inc. Figure 1-1. Motorola Silicon Applications and the MC145572EVK For More Information On This Product, Go to: www.freescale.com MC145572EVK 7 ...
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... Freescale Semiconductor, Inc. 1.3 FEATURES 1.3.1 General · Provides Stand-Alone NT1 and LT on Single Board · On-Board 68HC05 Microcontroller with Resident Monitor Software · Convenient Access to Key Signals · NT1 and LT Software Development Platform 1.3.2 Hardware · Only Power Supply · ÒPush-ButtonÓ Activation of U-Interface from NT1 · ...
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... Freescale Semiconductor, Inc. 1.4 BLOCK DIAGRAM Following is a basic functional block diagram for the MC145572EVK U-Interface Transceiver Evaluation Kit (Figure 1-2). While the board is capable of activating Òstand-alone,Ó the user may decide to use a single ASCII terminal to gain total control of the MC145572EVKÕs activities. ...
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... Freescale Semiconductor, Inc. 4. Become familiar with the layout and the various connectors. Locate the power connector J19. Locate the U-Interface connectors, J2 (LT U-Interface side) and J12 (NT U-Interface side). The DIP switches arrive preset from the factory (see Figure 1-3). Refer also to DIP Switch Functions in Section 2 ...
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... Freescale Semiconductor, Inc. TERMINAL Figure 1-4. External Connections to the MC145572EVK The board is now ready for power. 5. Connect + 5 V and ground leads to the proper pins on J19. Make certain the integrity of the power supply being used has been veriÞed to prevent any damage to the MC145572EVK ...
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... Freescale Semiconductor, Inc. 10. If available, connect an ASCII terminal to J16 (the DB-25 connector on the NT1 side of the board). Make certain the terminal is set for 9600 baud, 1 stop bit, and no parity. If there is no response, reverse the EIA-232 Tx and Rx signals by changing the jumpers on JP13. ...
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... Freescale Semiconductor, Inc. Refer to the MC145572EVK Printed Circuit Board and to the MC145572 U-Interface Transceiver data sheet to supplement this section. Please contact the factory before committing design to PCB to be guaranteed notiÞcation of any improvements to the following circuitry. The schematic of the MC145572EVK is in Appendix A of this manual. ...
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... Freescale Semiconductor, Inc. R19 TxP R18 RxP C33 MC145572 R20 RxN R22 TxN Figure 2-1. NT Line Interface Schematic and Component Values R3 TxP R2 RxP C8 MC145572 R5 RxN R7 TxN Figure 2-2. LT Line Interface Schematic and Component Values MC145572EVK For More Information On This Product J14 ...
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... Freescale Semiconductor, Inc. 2.1.2 Crystal Oscillator (LT Mode) In the LT mode, the internal phase locked loop (PLL) of the MC145572 generates a 20.48 MHz clock which is phase locked kHz reference clock applied at the FREQREF pin. This assures that the transmitted 2B1Q signal is synchronized to the 8 kHz frequency reference. A single pullable crystal, Y1, is all that is required for the MC145572 oscillator ...
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... Freescale Semiconductor, Inc. U-Interface Transceiver. Access to the control registers within the S/T-Interface Transceiver is gained through the SCP Interface. The registers are displayed and changed via resident software on the MC145572EVK. A complete description of the S/T-Interface Transceiver registers can be found in Sections 8, 9, and 10 of the MC145574 S/T-Interface Transceiver data sheet. ...
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... Freescale Semiconductor, Inc. 2.4 EIA-232 INTERFACE The MC145572EVK provides one connector for communication between a remote ASCII terminal and the on-board microcontroller Serial Communications Interface (SCI). J16 resides on the NT1 side. The connector is an industry standard DB-25 type and bring, transmit, and receive data on- or off-board via MotorolaÕ ...
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... Freescale Semiconductor, Inc. 2.5 BIT ERROR ANALYZER INTERFACE The MC145572EVK ISDN U-Interface Evaluation Kit provides TTL-compatible gated clocks for the B1, B2, and D time slots to allow easy connection to a bit error rate tester. This is accomplished with the use of glue logic. Access to these gated clock signals is through the headers (J9 on the LT side and J22 on the NT1 side) ...
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... Freescale Semiconductor, Inc. The timing diagrams for each of these modes are shown in Figure 2-5 and Figure 2-6. One example of a bit error rate test set-up is explained in the following section. DCL FSR DOUT DIN (TSEN) " LTSFAR NTSFAR LTGTCLK NTGTCLK NOTE: These clocks are available only when either OR7(b5) or OR8(b3) is set to 1. The example shown is for when the MC145572 is conÞ ...
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... Freescale Semiconductor, Inc. 2.5.1 Setting Up a Bit Error Rate Test Bit error rate testing with two different testers has been performed. The Hewlett Packard 1645A Data Error Analyzer and The Telecommunications Techniques Corporation FIREBERD 6000 with Lab Interface Adapter have successfully been connected to the MC145572EVK. Any bit error test that accepts TTL level signals and external data clocks ...
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... Freescale Semiconductor, Inc. BIT ERROR RATE TESTER EXTERNAL RxCLOCK EXTERNAL TxCLOCK RECEIVE DATA IN TRANSMIT DATA OUT *On some cases, this resistor may be needed to dampen ringing on clock transitions. Figure 2-7. Bit Error Rate Test Set-Up NT Side 2.5.1.1 OTHER LOOP-BACK TESTS. A variety of other loop-back modes may be implemented. ...
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... Freescale Semiconductor, Inc IDL D MC145574 ISDN S/T S/T-INTERFACE TRANSCEIVER C GATED BERTCLK CLOCK GENERATOR Figure 2-8. Loop-Back Modes for the MC145572EVK A: External Hardware IDL Loop-Back on NT1 Side. Place a jumper between BNC J18 NTRXDATA and BNC J20. Then, from the NT/LT activation menu, select option ...
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... Freescale Semiconductor, Inc. C: Other S/T-Interface Transceiver Loop-Backs. A variety of S/T-Interface and IDL loop-backs may be initiated from the command line interface by setting BR6(b7 Ð b0) in the S/T-Interface Transceiver. Refer to the MC145574/75 S/T-Interface data sheet for more information. D: IDL Loop-Back Internal to NT U-Interface Transceiver Towards NT1 Side. ...
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... Freescale Semiconductor, Inc. Table 2-1. MC145572 Test Header (J11) Quick Reference, NT Side Pin No. Silkscreen 1 IRQNT_U 2 20.48 MHz 3 15.36 MHz 4 TxBCLK TxBCLK/FREF 5 NTSCPCLK 8 SFSYNC/SFAX 9 NTSCPRx 10 4096 MHz 11 NTSCPEN 13 NTSCPTx 14 EYEDATA EYEDATA/DCHCLK SYSCLK/ SFAR SYSCLK/SFAR/TSEN/20.48 MHz 6 RxBCLK 7,12 GND Table 2-2. MC145572 Test Header (J1) Quick Reference, LT Side Pin No ...
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... Freescale Semiconductor, Inc. Table 2-3. NT1 DATA Signal Header (J22) Quick Reference Pin No. Silkscreen 2 Ð 20 GND Ground EVEN 1 DREQ S/T-Interface Transceiver DREQUEST 3 DGRANT S/T-Interface Transceiver DGRANT 5 NTSCPEN SCP Enable (NT U-Interface Transceiver) 7 STSCPEN SCP Enable ST (ST-Interface Transceiver) 9 LTSCPEN SCP Enable (LT U-Interface Transceiver) ...
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... Freescale Semiconductor, Inc. STSCPEN: SCP Enable ST (S/T-Interface Transceiver SCP EN). This signal, when held low, selects the Serial Control Port (SCP) for the transfer of control, status, and data information into and out of the MC145574 S/T-Interface Transceiver (U17). LTSCPEN: SCP Enable (LT U-Interface Transceiver SCP EN). ...
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... Freescale Semiconductor, Inc. Note that the M and the A bits used in the IDL interface of the MC145574 S/T-Interface Transceiver are not used by the MC145572, and, therefore, are not driven by the MC145572. NTFSR: (NT U-Interface Transceiver Pin FSR). This pin is an input when the MC145572 is conÞgured for slave mode and an output when conÞgured for master mode, as established by switch S4-1, MAS/SLV ...
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... Freescale Semiconductor, Inc. Table 2-4. LT Signal Header (JP9) Quick Reference Pin No. Silkscreen 2 Ð 20 GND Ground EVEN 1 LTFREF Output for 8 kHz Reference Clock 3 EXTREF Input for External 8 kHz Reference Clock LTSCPEN SCP Enable (LT U-Interface Transceiver) 11 SCPCLK SCP Clock 13 SCPTx SCP Transmit Output from MC145572s ...
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... Freescale Semiconductor, Inc. SCPRx: SCP Receive Input (SCP Rx). SCPRX is used to input control, status, and data information to the two MC145572 U-Interface Transceivers and the MC145574 S/T-Interface Transceiver. LTIRQ: Interrupt Request (LT U-Interface Transceiver IRQ). The LTIRQ pin is an active low open drain output used to signal the MCU devices that an interrupt condition exists in the LT MC145572 U-Interface Transceiver (U1) ...
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... Freescale Semiconductor, Inc. LTSFAR: Receive Superframe Alignment. This pin carries a signal that indicates the Þrst 2B+D frame superframe to be received from the U-Interface. This signal is not active when the LT side MC145572 is conÞgured for full GCI mode operation. When the LT side MC145572 is conÞgured for full GCI mode operation, S2-5 in GCI position, this pin provides the recovered timing clock ...
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... Freescale Semiconductor, Inc. Table 2-5. NT and LT Side MC145572EVK Header List (Continued) JP11 Short R21 Terminate Line with 135 W JP12 JP13 Swaps Tx and Rx Pins at J16 JP14 Default Termination Impedance on S/T Transmit JP15 Default Termination Impedance on S/T Receive 2.7 DIP SWITCH FUNCTIONS Four sets of DIP switches are provided for MC145572EVK conÞguration and testing. These switches are preset at the factory. In normal operation, the MC145572EVK is conÞ ...
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... Freescale Semiconductor, Inc. 2.7.2 NT Side Configuration DIP Switch S4 This DIP switch is used to conÞgure operation of the NT side of the MC145572EVK. In particular, the MC145572 U-Interface Transceiver is conÞgurable for IDL or GCI operation, master or slave timing mode, and Parallel or Serial Control Port operation. Table 2-7. NT Side ConÞguration DIP Switch S4 ...
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... Freescale Semiconductor, Inc. 2.7.4 LT Side Configuration DIP Switch S7 This DIP switch is used to conÞgure operation of the LT side of the MC145572EVK. In particular, the MC145572 U-Interface Transceiver is conÞgurable for IDL or GCI operation, master or slave timing mode, Parallel or Serial Control Port operation. Table 2-9. LT Side ConÞguration DIP Switch S2 ...
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... Freescale Semiconductor, Inc. SOFTWARE DESIGN DESCRIPTION 3.1 OPERATING PROCEDURES A resident terminal program permits the user to interact with the MC145572EVK. The commands provide the following functions: a. Activation with or without loop-backs. b. ModiÞcations to and displays of registers. c. ModiÞcations to and status of eoc functions. d. Deactivation options. ...
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... Freescale Semiconductor, Inc. The terminal interface does NOT have multiple character type ahead. 3.1.3 Push-Button Activation One push-button is provided for activating/deactivating the U-Interface Transceivers without the necessity of using a terminal. The activate push-button (PB2) can be pressed to activate/deactivate the U-interface. Pressing the activate push-button toggles the current activation mode. If the U-Interface Transceiver(s) is not activated, pressing the activate push-button activates it ...
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... Freescale Semiconductor, Inc. BRT: Read/Write S/T-Interface Transceiver Byte Register, Alternate Form CLR: Clears febe/nebe, Re-Enters BR4 and BR5 in Both LT and NT Side U-Transceivers DEA: Activation/Deactivation Menu, Alternate Form DIS: Display Formatted Registers EOC: Embedded Operations Channel Menu HEL: Help Menu LOF: Disable LT M4 Handler ...
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... Freescale Semiconductor, Inc. 3.2.1.2 LOOP-BACK OPTIONS. The activate command provides Þve different points on the MC145572EVK board where loop-backs are permitted when one or both U-Interface Transceivers are activated. At any given time, only one loop-back point can be enabled. This permits user equipment to be connected to the opposite side of the MC145572EVK ...
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... Freescale Semiconductor, Inc. *** NT\LT Activation\Deactivation Menu *** A..Activate NT side as an NT1 B..Activate NT side U chip, 2B+D loopback at T Chip IDL port C..Activate NT side U chip, disable T chip D..Activate T Chip E..Activate LT side U chip F..Activate LT side U chip, 2B+D loopback to U interface at LT end G..Activate both U chips with NT side as an NT1 H ...
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... Freescale Semiconductor, Inc. If the RO/WO bit in U-Interface Transceiver BR14 is not set, the data echoed back may not be the same as the data written to the byte register. EXAMPLE NTLT>BRL 6 1 BR6:01 NTLT> 3.2.3 BRN — Read/Write NT U-Interface Transceiver Byte Register 3.2.3.1 FORMAT. BRN <r>[ dd]<ENTER> ...
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... Freescale Semiconductor, Inc. the register number written to, the speciÞed register is updated and the updated register contents are echoed to the terminal. Bits that are read only/write only bits may not necessarily reßect the value written to them when echoed to the terminal. EXAMPLE NTLT> ...
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... Freescale Semiconductor, Inc (NT side U-Interface Transceiver register set (LT side U-Interface Transceiver register set (S/T-Interface Transceiver register set (S/T-Interface Transceiver register set (all chips (both U-Interface Transceivers on-board) If DIS<ENTER> is given, the command defaults to display all registers. This command displays the entire register set of the selected chip(s) on the terminal. The display is formatted by speciÞ ...
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... Freescale Semiconductor, Inc. OR0:00 OR1:04 OR2:8 OR3:00 OR8:00 OR9:00 MC145574 S-T Chip Register Contents NR0:0 NR1:B NR2:1 NR3:8 BR0:00 BR1:00 BR2:00 BR3:F0 BR8:C0 BR9:00 BR10:00 BR11:00 BR12:00 BR13:00 BR14:00 BR15:4C NTLT> 3.2.9 eoc — Embedded Operations Channel Menu 3.2.9.1 FORMAT. eoc<ENTER> ...
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... Freescale Semiconductor, Inc. indicates that when the least signiÞcant bit of the address nibble then eoc data is being transmitted. In ANSI terminology, the address nibble is referred to as the address/message indicator. The software on the MC145572EVK only responds to eoc addresses of 000 or 111, the broadcast address. ...
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... Freescale Semiconductor, Inc. Last eoc sent: FFF **** LT End eoc Menu **** A..B1 loopback at NT1 B..B2 loopback at NT1 C..2B+D loopback at NT1 D..NT1 send bad crc E..Notify NT1 of bad crc <ENTER> quits menu Enter desired selection: <ENTER> NTLT> 3.2.10 HEL — Help Menu 3.2.10.1 FORMAT. ...
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... Freescale Semiconductor, Inc. MM AA[ dd] CLR LON LOF NON NOF U: U chips chip chip chip, A: all < >:required option NTLT> 3.2.11 LOF — Disable LT M4 Handler 3.2.11.1 FORMAT. LOF<ENTER> This command turns off automatic control of the M4 ACT bit at the LT. The M4 messages must be handled manually via the byte register commands ...
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... Freescale Semiconductor, Inc. MC145572EVK after invoking any of the LPU commands. Each U-Interface Transceiver can be independently put into analog loop-back. The echo canceller loop-back is an external analog loop-back where data received on the U-Interface Transceiver IDL Rx pin is framed up and then transmitted as 2B1Q symbols. The 2B1Q symbols are received by the U-Interface Transceiver and cancelled by the echo canceller ...
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... Freescale Semiconductor, Inc. EXAMPLE NTLT>lpu n NTLT>dis n MC145472 U Chip Register Contents (NT) NR0 : 0 NR1 : B NR2 : 1FF BR0 : 77 BR1 : 7F BR2 : F0 BR6 : 00 BR7 : 04 BR8 : 31 BR9 : 80 BR10 : 00 BR14: 00 BR15: 46 BR15A( BR15A( OR0 : 00 OR1 : 00 OR2 : 00 OR6 : 00 OR7 : 20 OR8 : 08 OR9 : 00 NTLT> 3.2.14 MM — Modify Memory 3.2.14.1 FORMAT. mm aa[ dd]<ENTER> ...
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... Freescale Semiconductor, Inc. EXAMPLE Read address 51 NTLT>mm 51 Unknown data read from address 51 51:xx Write hex 2E to address 51 NTLT> Echo updated contents to terminal 51:2E Command line prompt NTLT> 3.2.15 NOF — Disable NT1 Function 3.2.15.1 FORMAT. NOF<ENTER> This command disables all NT1 functions on the board. This permits the user to have total manual control over maintenance channels on the NT via the nibble and byte register commands ...
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... Freescale Semiconductor, Inc. Bits that are read only/write only may not necessarily reßect the value written to them when echoed to the terminal. EXAMPLE NTLT>NRL 4 1 NR4:1 Make all registers read/write NTLT>BRL 14 40 Updated BR14 echoed to terminal BR14:40 Write hex 151 to eoc framer NTLT> ...
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... Freescale Semiconductor, Inc. Updated BR14 echoed to terminal BR14:40 Write hex 152 to eoc framer NTLT>NRN 6 152 R6:152 NTLT> 3.2.19 NRS — Read/Write S/T-Interface Transceiver Nibble Register 3.2.19.1 FORMAT. NRS <r>[ d]<ENTER> Ð 6 for register number d = hex data for write; one digit The NRS command reads or writes any of the seven nibble registers on the S/T-Interface Transceiver. ...
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... Freescale Semiconductor, Inc. 3.2.21 ORL — Read/Write LT U-Interface Transceiver Byte Register 3.2.21.1 FORMAT. ORL <r>[ dd]<ENTER> Ð 10,12,13; register number in decimal dd = hex data for write; one or two digits This command reads or writes any of the 12 overlay registers on the LT side U-Interface Transceiver. Byte register BR10 is also included in the range of this command since BR10 appears in the overlay register map. The command defaults to a read of the speciÞ ...
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... Freescale Semiconductor, Inc. 3.2.23 RES — Reset S/T-Interface Transceiver and/or U-Interface Transceivers 3.2.23.1 FORMAT. RES[ device]<ENTER> device = N (NT side U-Interface Transceiver (LT side U-Interface Transceiver (S/T-Interface Transceiver (S/T-Interface Transceiver (reset board device is given, the command defaults to: RES A<ENTER>. This command resets the speciÞed integrated circuit by strobing its reset line. ...
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