MC145572APB Freescale Semiconductor, MC145572APB Datasheet - Page 31

• Manufacturer Part Number: MC145572APB
• Description: IC ISDN INTERFACE TXCVER 44-LQFP
• Manufacturer: Freescale Semiconductor
• Type: Transceiverr

Specifications of MC145572APB

• Protocol: RS232
• Voltage - Supply: 5V
• Mounting Type: Surface Mount
• Package / Case: 44-LQFP
• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Not Compliant

2.7.2
This DIP switch is used to conÞgure operation of the NT side of the MC145572EVK. In particular, the
MC145572 U-Interface Transceiver is conÞgurable for IDL or GCI operation, master or slave timing mode,
and Parallel or Serial Control Port operation.
2.7.3
This DIP switch is used to conÞgure the time slot and input pins of the LT side MC145572 when it is
conÞgured for GCI mode by setting S2-5 to the GCI position. In normal operation, S2-5 is in the IDL2
position and the settings of this DIP switch do not affect operation of the MC145572EVK.
DIP Switch
DIP Switch
MC145572EVK
32
S4-10
S4-1
S4-2
S4-3
S4-4
S4-5
S4-6
S4-7
S4-8
S4-9
S1-1
S1-2
S1-3
S1-4
S1-5
S1-6
NT Side Configuration DIP Switch S4
LT Side GCI Parameters DIP Switch S1
GCI2048
T_MAS
NT1EN
Open
Open
IN1HI
IN2HI
MAS
S0HI
S1HI
S2HI
FSR
IDL2
PAR
FIX
TE
8
Function
Function
FSR=FSX
RESMCU
IN1LOW
IN2LOW
NT1DIS
S0LOW
S1LOW
S2LOW
Closed
Closed
GCI512
T_SLV
ADP
SER
SLV
GCI
NT
10
Freescale Semiconductor, Inc.
Table 2-8. LT Side GCI Parameters DIP Switch S2
Selects the level on the M/S Pin to the NT1 U-Interface Transceiver.
Connects the FSR and FSX pins of the NT side MC145572 when closed. Use only in
slave mode.
Selects 10- or 8-bit mode gated IDL clock outputs for use with a bit error analyzer on
the NT1 side when the MC145572 is conÞgured for MCU mode operation.
When open, the MC145572 is conÞgured for MCU operation and the time division
multiplexed bus interface to the MC145572 is in the IDL2 mode. When closed, the
MC145572 is conÞgured for GCI operation and all 2B+D and control/status
information is transferred over the GCI interface.
Selects between the serial control port or parallel control port mode of accessing the
NT side MC145572 when S4-4 is in the IDL2 mode position.
Selects between setting the MC145574 as a slave or master for the IDL2 bus.
Controls the state of the microcontroller reset line. This is an input to the hardware
reset of the MC68HC705C8 and is useful when using another platform to control the
MC145572EVK. When closed, a reset signal is applied to U15.
Selects either the adaptive or the Þxed timing recovery mode for the S/T-Interface
Transceiver.
Selects the operating mode of the S/T-Interface Transceiver Ñ TE mode or NT mode.
This signal is tied to the select lines of an analog multiplexer that conÞgures TE/NT(L)
(U17-4),SG/DGRANT/ANDOUT (U17-8), and DREQUEST/ANDIN (U17-9) on the
MC145574 appropriately.
Turns NT1 function on or off. When the NT1 function is off, the user has complete
control of all maintenance channel registers via the terminal interface. When open,
the NT1 is enabled. When closed, the NT1 is disabled.
Program LT side MC145572 GCI S0 time slot select pin.
Program LT side MC145572 GCI S0 time slot select pin.
Program LT side MC145572 GCI S0 time slot select pin.
Select between 2.048 MHz and 512 kHz DCL clock when LT side MC145572 is in
GCI mode.
Used to select level on IN1 Pin of MC145572 when LT side MC145572 is in GCI
mode.
Used to select level on IN2 Pin of MC145572 when LT side MC145572 is in GCI
mode.
Table 2-7. NT Side ConÞguration DIP Switch S4
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Description
Description
GCI2048
Factory
Factory
Setting
Setting
NTIDIS
CLKHI
OPEN
IN1HI
IN2HI
MAS
IDL2
S0HI
S1HI
S2HI
FSR
SER
ADP
TE
10