Z16FMC32AG20EG Zilog, Z16FMC32AG20EG Datasheet - Page 311

• Manufacturer Part Number: Z16FMC32AG20EG
• Description: Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D
• Manufacturer: Zilog
• Series: Z16FMCr

Specifications of Z16FMC32AG20EG

• Processor Series: Z16FMC
• Core: ZNEO
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Development Tools By Supplier: Z16FMC28200KITG
• Minimum Operating Temperature: - 40 C
• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Eeprom Size: -
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

Oscillator Control Register Definitions
PS028702-1210
Clock Failure Detection and Recovery
Oscillator Control Register
Primary Oscillator Failure
The Z16FMC device generates a System Exception when a failure of the primary
oscillator occurs if the
function in this situation, the clock failure recovery circuitry automatically forces the
Watchdog Timer oscillator to drive the system clock. Although this oscillator runs at a
much lower frequency than the original system clock, the CPU continues to operate,
allowing execution of a clock failure vector and software routines that either remedy the
oscillator failure or issue a failure alert. This automatic switch-over is not available if the
WDT is the primary oscillator.
The primary oscillator failure detection circuitry asserts if the system clock frequency
drops below 1 kHz ±50%. For operating frequencies below 2 kHz, do not enable the clock
failure circuitry (
Watchdog Timer Failure
In the event of a Watchdog Timer oscillator failure, a System Exception is used if the
WDFEN
switch-over, but alerts the CPU of the failure. After a WDT failure, it is no longer possible
to detect a primary oscillator failure.
The Watchdog Timer oscillator failure detection circuit counts system clocks while
looking for a WDT clock. The logic counts 8000 system clock cycles before determining
that a failure occurred. The system clock rate determines the speed at which the WDT
failure is detected. A very slow system clock results in very slow detection times.
deassert the
The Oscillator Control Register (OSCCTL) enables or disables the various oscillator
circuits, enables/disables the failure detection/recovery circuitry, actively powers down
the flash and selects the primary oscillator, which becomes the system clock.
The Oscillator Control Register must be unlocked before writing. Writing the two-step
sequence
register locks after completion of a register write to the OSCCTL.
If the WDT is the primary oscillator or if the Watchdog Timer oscillator is disabled,
bit of the OSCCTL register is set. This event does not trigger an attendant clock
E7H
WDFEN
followed by
POFEN
bit of the OSCCTL register.
POFEN
must be deserted in the OSCCTL register).
P R E L I M I N A R Y
18H
bit is set in the OSCCTL register. To maintain system
to the Oscillator Control Register address unlocks it. The
Z16FMC Series Motor Control MCUs
Product Specification
Oscillator Control
289