ZLF645S0P2032G Zilog, ZLF645S0P2032G Datasheet - Page 161

• Manufacturer Part Number: ZLF645S0P2032G
• Description: Microcontrollers (MCU) 32K Flash 512B RAM 20 pin
• Manufacturer: Zilog

Specifications of ZLF645S0P2032G

• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 512 KB
• Interface Type: ICP, UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: PDIP-20
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details

Table 75. Symbolic Notation for Operands (Continued)
PS026407-0408
Symbol
RR1
RR2
Ir1
Ir2
Irr1
Irr2
IR1
IR2
IRR1
X(r1)
X(r2)
Assembly
Operand
%
@R n
@RR n
@%
@%
%
aa
aa
aa
aa
(R n )
Description
Register Pair (8-bit Address)
RR1 or RR2 represents the 8-bit address of a register pair. For addresses
00h–DFh or F0h–FFh , the equivalent 12-bit address is {RP[3:0], %
For addresses E0h–EFh (escaped mode), the equivalent 12-bit address is
{RP[3:0], RP[7:4], %
Indirect Working Register
Ir1 or Ir2 represents the name a working register, R n, where n = 0, 1, 2,..., 15.
@ indicates Indirect Working register addressing using an 8-bit effective
address contained in the specified working register. The accessed register’s
equivalent 12-bit address is {RP[3:0], 8-bit effective address }.
Indirect Working Register Pair
Irr1 or Irr2 represents the name of a working register pair, RRn, where n = 0, 2,
4,..., 14.
@ indicates Indirect Working register addressing using an effective address in
the specified working register pair. Depending on the instruction, the effective
address is in the register file (12-bit address) or Program/Constant Memory
(16-bit address).
Indirect Register
IR1 or IR2 represents the 8-bit address of a register.
@ indicates Indirect register addressing using an 8-bit effective address
contained in the specified register. The accessed register’s equivalent 12-bit
address is {RP[3:0], 8-bit effective address }.
Indirect Register Pair
IRR1 represents the 8-bit address of a register.
@ indicates Indirect register addressing with a 16-bit effective address (in
Program Memory) contained in the specified register pair.
Indexed (X) Addressing
X represents the 8-bit base address to which the offset is added.
r1 or r2 represents the name, R
signed offset. The 8-bit effective address is the sum of X and the contents of
working register R
{RP[3:0],
8-bit effective address
n
. The accessed register’s equivalent 12-bit address is
aa
[3:0]}.
}.
n
, of a working register containing the 8-bit
ZLF645 Series Flash MCUs
Product Specification
Addressing Notation
aa
}.
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