LTC6602IUF#PBF Linear Technology, LTC6602IUF#PBF Datasheet - Page 20

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LTC6602IUF#PBF

Manufacturer Part Number
LTC6602IUF#PBF
Description
IC FILTER BANDPASS/LOWPASS 24QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC6602IUF#PBF

Filter Type
Bandpass
Frequency - Cutoff Or Center
300kHz
Number Of Filters
2
Max-order
5th
Voltage - Supply
2.7 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
24-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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APPLICATIONS INFORMATION
LTC6602
If the lowpass cutoff frequency varies then the Figure 12b
circuit must be used.
The output common mode voltage is equal to the voltage
of the V
supply voltage by an internal resistive divider (see Block
Diagram). To alter the common mode output voltage, V
can be driven with an external voltage source or resistor
network. If external resistors are used, it is important to
note that the internal 1.6k resistors can vary ±30% (their
ratio varies only ±1%). The filter outputs can also be AC
coupled.
The LTC6602 can be interfaced to an A/D converter by pull-
ing CLKCNTL (Pin 5) to V+
as a clock output, which can be used to drive the clock
input of the A/D converter. This allows the A/D converter
to be synchronized with the filter sampling clock, avoiding
“beat frequencies” and simplifying the board layout. Any
routing attached to the CLKIO pin should be as short as
possible, in order to minimize ringing.
20
OCM
pin. The V
0.1µF
V
+
IN1
OCM
D
3.3V
. This configures CLKIO (Pin 15)
pin is biased to one half of the
V+
V+
V+
+INA
–INA
CLKCNTL
CLKIO
GND
IN
A
D
Figure 13. Two Filters in a Master/Slave Configuration
LTC6602
MASTER
+OUTA
–OUTA
R
BIAS
V
+
R
OUT1
OCM
BIAS
Similarly, two LTC6602s can be connected in a master/
slave configuration as shown in Figure 13. This results
in four matched filter channels, all synchronized to the
same clock. The master has its CLKCNTL pin pulled to
V+
slave has its CLKCNTL pin pulled to ground, configuring
its CLKIO pin as an input.
Output Drive
The filter outputs can drive 1k and/or 50pF loads connected
to AC ground with a 0.5V to 2.5V signal (corresponding
to a 4V
connected between +OUTA and –OUTA or +OUTB and
–OUTB) the outputs can produce a 4V
and/or 25pF . For smaller signal amplitudes, the outputs can
drive correspondingly heavier loads. For larger capacitive
loads, an external 50Ω series resistor is recommended
for each output.
0.1µF
V
+
D
IN2
, configuring its CLKIO pin as an output, while the
P-P
3.3V
differential signal). For differential loads (loads
V+
V+
V+
+INA
–INA
CLKCNTL
CLKIO
GND
IN
A
D
LTC6602
SLAVE
+OUTA
–OUTA
R
6602 F13
BIAS
V
+
R
OUT2
BIAS
P-P
signal across 2k
6602fc

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