MF4CN-50 National Semiconductor, MF4CN-50 Datasheet - Page 2

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MF4CN-50

Manufacturer Part Number
MF4CN-50
Description
IC LOWPASS FILTER 4TH ORD SW CAP
Manufacturer
National Semiconductor
Datasheet

Specifications of MF4CN-50

Filter Type
Butterworth, Lowpass Switched Capacitor
Frequency - Cutoff Or Center
20kHz
Number Of Filters
1
Max-order
4th
Voltage - Supply
5 V ~ 14 V
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*MF4CN-50
MF4NC-50

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Quantity
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Pin
Block Diagram
Pin Descriptions
7,
#
1
2
3
5
6
4
FILTER
CLK IN
CLK R
AGND
V
Name
L. Sh
OUT
Pin
+
, V
A CMOS Schmitt-trigger input to be
used with an external CMOS logic level
clock. Also used for self clocking
Schmitt-trigger oscillator (see section
1.1).
A TTL logic level clock input when in
split supply operation (
with L. Sh tied to system ground. This
pin becomes a low impedance output
when L. Sh is tied to V
conjunction with the CLK IN pin for a
self clocking Schmitt-trigger oscillator
(see section 1.1). The TTL input signal
must not exceed the supply voltages
by more than 0.2V.
Level shift pin; selects the logic
threshold levels for the clock. When
tied to V
buffer stage between the Schmitt
trigger and the internal clock level shift
stage thus enabling the CLK IN
Schmitt-trigger input and making the
CLK R pin a low impedance output.
When the voltage level at this input
exceeds 25% (V
internal tri-state buffer is disabled
allowing the CLK R pin to become the
clock input for the internal clock
level-shift stage. The CLK R threshold
level is now 2V above the voltage on
the L. Sh pin. The CLK R pin will be
compatible with TTL logic levels when
the MF4 is operated on split supplies
with the L. Sh pin connected to system
ground.
The output of the low-pass filter. It will
typically sink 0.9 mA and source 3 mA
and swing to within 1V of each supply
rail.
The analog ground pin. This pin sets
the DC bias level for the filter section
and must be tied to the system ground
for split supply operation or to
mid-supply for single supply operation
(see section 1.2). When tied to
mid-supply this pin should be well
bypassed.
The positive and negative supply pins.
The total power supply range is 5V to
14V. Decoupling these pins with 0.1 µF
capacitors is highly recommended.
(Continued)
it enables an internal tri-state
Function
+
− V
±
) + V
. Also used in
2.5V to
the
±
7V)
2
Pin
#
8
FILTER
Name
Pin
IN
The input to the low-pass filter. To
minimize gain errors the source
impedance that drives this input should
be less than 2K (see section 1.3 of the
Application Hints). For single supply
operation the input signal must be
biased to mid-supply or AC coupled
through a capacitor.
Function

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