SI3056-KS Silicon Laboratories Inc, SI3056-KS Datasheet - Page 86

IC ISOMODEM DAA SYS-SIDE 16SOIC

SI3056-KS

Manufacturer Part Number
SI3056-KS
Description
IC ISOMODEM DAA SYS-SIDE 16SOIC
Manufacturer
Silicon Laboratories Inc
Type
Chipsetr
Datasheets

Specifications of SI3056-KS

Package / Case
16-SOIC (3.9mm Width)
Data Format
V.92
Interface
Serial
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Product
Modem Chip
Supply Voltage (min)
3 V
Supply Current
8.5 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Baud Rates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI3056-KS
Manufacturer:
SILICONIX
Quantity:
20 000
Si3018/19/10
8. Pin Descriptions: Si3018/19/10
86
Pin #
10
12
11
1
2
3
4
5
6
7
8
9
Pin Name
VREG2
VREG
RNG1
RNG2
DCT
C1B
C2B
QE2
QE
RX
SC
IB
Transistor Emitter.
Connects to the emitter of Q3.
DC Termination.
Provides dc termination to the telephone network.
Receive Input.
Serves as the receive side input from the telephone network.
Isolation Capacitor 1B.
Connects to one side of isolation capacitor C1. Used to communicate with the system-
side device.
Internal Bias.
Provides internal bias.
Isolation Capacitor 2B.
Connects to one side of the isolation capacitor C2. Used to communicate with the
system-side device.
Voltage Regulator.
Connects to an external capacitor to provide bypassing for an internal power supply.
Ring 1.
Connects through a resistor to the RING lead of the telephone line. Provides the ring
and caller ID signals to the system-side device.
Ring 2.
Connects through a resistor to the TIP lead of the telephone line. Provides the ring
and caller ID signals to the system-side device.
Voltage Regulator 2.
Connects to an external capacitor to provide bypassing for an internal power supply.
Circuit Enable.
Enables transistor network. Should be tied through a 0 Ω resistor to I
Transistor Emitter 2.
Connects to the emitter of transistor Q4.
Table 25. Si3018/19/10 Pin Descriptions
VREG
RNG1
DCT
C1B
C2B
QE
RX
IB
1
2
3
4
5
6
7
8
Rev. 1.03
16
15
14
13
12
10
11
9
Description
DCT2
IGND
DCT3
QB
QE2
SC
VREG2
RNG2
GND
.

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