AD9895KBCZRL Analog Devices Inc, AD9895KBCZRL Datasheet - Page 5

• Manufacturer Part Number: AD9895KBCZRL
• Description: IC CCD SIGNAL PROC/GEN 64-CSPBGA
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 12-Bitr

Specifications of AD9895KBCZRL

• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 64-CSPBGA
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Sample Rate: 30MSPS
• Operating Supply Voltage (min): 2.7/3V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

AD9895–ANALOG SPECIFICATIONS
Parameter
CDS
PIXEL GAIN AMPLIFIER (PxGA)
VARIABLE GAIN AMPLIFIER (VGA)
BLACK LEVEL CLAMP
A/D CONVERTER
VOLTAGE REFERENCE
SYSTEM PERFORMANCE
*
Specifications subject to change without notice.
REV. A
Input signal characteristics defined as follows:
TRANSIENT
500mV TYP
Gain
Allowable CCD Reset Transient
Max Input Range before Saturation
Max CCD Black Pixel Amplitude
Max Input Range
Max Output Range
Gain Control Resolution
Gain Monotonicity
Gain Range
Max Input Range
Max Output Range
Gain Control Resolution
Gain Monotonicity
Gain Range
Clamp Level Resolution
Clamp Level
Resolution
Differential Nonlinearity (DNL)
No Missing Codes
Full-Scale Input Voltage
Reference Top Voltage (VRT)
Reference Bottom Voltage (VRB)
Gain Accuracy
Peak Nonlinearity, 500 mV Input Signal
Total Output Noise
Power Supply Rejection (PSR)
RESET
Min Gain (PxGA Code 32)
Med Gain (PxGA Code 0)
Max Gain (PxGA Code 31)
Low Gain (VGA Code 70)
Max Gain (VGA Code 1023)
Min Clamp Level
Max Clamp Level
Low Gain (VGA Code 70)
Max Gain (VGA Code 1023)
BLACK PIXEL
200mV MAX
OPTICAL
SIGNAL RANGE
1V MAX
INPUT
38.5
Min
1.0
1.0
1.6
1.6
2.0
12
5
(AVDD1, AVDD2 = 3.0 V, f
Guaranteed
Typ
0
500
± 200
64
Guaranteed
–2.5
+3.5
+9.5
1024
Guaranteed
2
36
256
0
255
± 0.5
2.0
2.0
1.0
6
39.5
0.2
0.8
40
–5–
Max
± 1.0
40.5
7
CLI
= 30 MHz, T
Bits
dB
%
LSB rms
Unit
dB
mV
V p-p
mV
V p-p
V p-p
Steps
dB
dB
dB
V p-p
V p-p
Steps
dB
dB
Steps
LSB
LSB
LSB
V
V
V
dB
dB
MIN
to T
MAX
Notes
Input signal characteristics*
Default setting
Measured at ADC output
Includes entire signal chain
Includes 4 dB default PxGA gain
Gain = (0.035
12 dB gain applied
AC grounded input, 6 dB gain applied
Measured with step change on supply
, unless otherwise noted.)
AD9891/AD9895
Code) + 3.55 dB