DS1876T+T&R Maxim Integrated Products, DS1876T+T&R Datasheet - Page 43

• Manufacturer Part Number: DS1876T+T&R
• Description: IC CTRLR SFP DUAL LDD 28TQFN
• Manufacturer: Maxim Integrated Products
• Type: SFP Laser Controllerr

Specifications of DS1876T+T&R

• Input Type: Logic
• Output Type: Logic
• Interface: I²C
• Current - Supply: 10mA
• Mounting Type: Surface Mount
• Package / Case: 28-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 01h, Register FCh: WARN EN
FCh
POWER-ON VALUE
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
Layout is identical to WARN
Register 71h) logic. The MASK bit (Table 02h, Register 88h) determines whether this memory exists in Table 01h or 05h.
<C>
BIT 7
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
TEMP HI
______________________________________________________________________________________
SFP Controller with Dual LDD Interface
<C>
TEMP HI [A2h or B2h]:
0 = Disables interrupt from TEMP HI warning.
1 = Enables interrupt from TEMP HI warning.
TEMP LO [A2h or B2h]:
0 = Disables interrupt from TEMP LO warning.
1 = Enables interrupt from TEMP LO warning.
VCC HI [A2h or B2h]:
0 = Disables interrupt from VCC HI warning.
1 = Enables interrupt from VCC HI warning.
VCC LO [A2h or B2h]:
0 = Disables interrupt from VCC LO warning.
1 = Enables interrupt from VCC LO warning.
BMON1 HI [A2h]:
0 = Disables interrupt from BMON1 HI warning.
1 = Enables interrupt from BMON1 HI warning.
BMON1 HI [B2h]:
0 = Disables interrupt from BMON2 HI warning.
1 = Enables interrupt from BMON2 HI warning.
BMON1 LO [A2h]:
0 = Disables interrupt from BMON1 LO warning.
1 = Enables interrupt from BMON1 LO warning.
BMON2 LO [B2h]:
0 = Disables interrupt from BMON2 LO warning.
1 = Enables interrupt from BMON2 LO warning.
PMON1 HI [A2h]:
0 = Disables interrupt from PMON1 HI warning.
1 = Enables interrupt from PMON1 HI warning.
PMON2 HI [B2h]:
0 = Disables interrupt from PMON2 HI warning.
1 = Enables interrupt from PMON2 HI warning.
PMON1 LO [A2h]:
0 = Disables interrupt from PMON1 LO warning.
1 = Enables interrupt from PMON1 LO warning.
PMON2 LO [B2h]:
0 = Disables interrupt from PMON2 LO warning.
1 = Enables interrupt from PMON2 LO warning.
TEMP LO
3
3
in Lower Memory, Register 74h. Enables warnings to create TXFINT (Lower Memory,
00h
PW2 or (PW1 and RWTBL1C) or (PW1 and RTBL1C)
PW2 or (PW1 and RWTBL1C)
Mixture of common memory locations and different memory locations (see the bit
descriptions)
Nonvolatile (SEE)
<C>
VCC HI
<C>
VCC LO
<D>
BMON HI
<D>
BMON LO
<D>
PMON HI
<D>
PMON LO
BIT 0
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