AD9806KST Analog Devices Inc, AD9806KST Datasheet
AD9806KST
Specifications of AD9806KST
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AD9806KST Summary of contents
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CCDIN CLPDM DAC1 DAC2 PRODUCT DESCRIPTION The AD9806 is a complete analog signal processor for CCD applications. It features an 18 MHz single-channel architecture designed to sample and condition the outputs of interlaced and progressive scan area CCD arrays. ...
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AD9806–SPECIFICATIONS GENERAL SPECIFICATIONS Parameter TEMPERATURE RANGE Operating Storage POWER SUPPLY VOLTAGE (For Functional Operation) Analog, Digital, Digital Driver POWER CONSUMPTION (Selected through Serial Interface D-Reg) Normal Operation (D-Reg 00) High-Speed AUX Mode (D-Reg 01) Reference Standby (D-Reg 10) Total Shut-Down ...
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CCD-MODE SPECIFICATIONS Parameter POWER CONSUMPTION 3.3 DD MAXIMUM CLOCK RATE CDS Gain 1 Allowable CCD Reset Transient 1 Max Input Range before Saturation PGA Gain Control Resolution Gain Range (See ...
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AD9806–SPECIFICATIONS AUX-MODE SPECIFICATIONS Parameter POWER CONSUMPTION Normal (D-Reg 00) High-Speed (D-Reg 01) MAXIMUM CLOCK RATE Normal (D-Reg 00) High-Speed (D-Reg 01) PGA (Gain Selected through Serial Interface F-Reg) Max Input Range Max Output Range Gain Control Resolution Gain Range Min ...
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... SHP, SHD, DATACLK CLPOB, CLPDM, PBLK SCK, SL, SDATA VRT, VRB, CMLEVEL CCDIN, CLPOUT, CLPREF, CLPBYP Junction Temperature Lead Temperature (10 sec) Model Temperature Range AD9806KST –20°C to +85°C THERMAL CHARACTERISTICS Thermal Resistance 48-Lead LQFP Package θ = 92°C JA CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection ...
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AD9806 Pin No. Mnemonic Type 1, 15 2–11 D0– DRVDD P 13 DRVSS P 14 DVSS P 16 ADCCLK DI 17 DVDD P 18 STBY DI 19 PBLK DI 20 CLPOB DI 21 SHP DI 22 ...
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TIMING SPECIFICATIONS CCD N SHP t INHIBIT SHD ADCCLK t OD N–0 D0–D9 NOTES: 1. SHP AND SHD SHOULD BE OPTIMALLY ALIGNED WITH THE CCD SIGNAL. SAMPLES ARE TAKEN AT THE RISING EDGES. 2. ADCCLK RISING EDGE MUST OCCUR AT ...
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AD9806 TIMING SPECIFICATIONS (Continued) VIDEO SIGNAL INPUT CLAMP INTERVAL (AD9806 INTERNAL SIGNAL) NOTE: The AD9806 uses an “automatic” video clamp that senses the most negative in the input signal and uses this level to set the clamp voltage. As shown ...
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SERIAL INTERFACE SPECIFICATIONS SDATA SELECT MODES PGA DAC1 DAC2 1 1 MODES2 a0–a1 b0–b1 A-REG B-REG (a) OPERATION MODES (b) OUTPUT MODES g0–g7 ...
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AD9806 REGISTER DESCRIPTION (a) A-REGISTER: Modes of Operation a1 a0 Modes 0 0 ADC-MODE 0 1 AUX-MODE 1 0 AUXMID-MODE 1 1 CCD-MODE (b) B-REGISTER: Output Modes ...
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APPLICATION INFORMATION Grounding and Decoupling Recommendations As shown in Figure 10, a single ground plane is recommended for the AD9806. This ground plane should be as continuous as possible, particularly around Pins 25 through 37. This will ensure that all ...
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AD9806 DIGITAL OUTPUT DATA CONNECT SDATA SCK 0.1 F 1 (LSB ...