AD9807JS Analog Devices Inc, AD9807JS Datasheet - Page 19

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AD9807JS

Manufacturer Part Number
AD9807JS
Description
IC CCD SIGNAL PROC 12BIT 64-PQFP
Manufacturer
Analog Devices Inc
Type
CCD Signal Processor, 12-Bitr
Datasheets

Specifications of AD9807JS

Rohs Status
RoHS non-compliant
Input Type
Logic
Output Type
Logic
Interface
Microprocessor
Current - Supply
86mA
Mounting Type
Surface Mount
Package / Case
64-MQFP, 64-PQFP
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Not Compliant

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Part Number
Manufacturer
Quantity
Price
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AD9807JS
Manufacturer:
ADI
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Part Number:
AD9807JS
Manufacturer:
ADI/亚德诺
Quantity:
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CIS Application
Unlike many other integrated circuit CCD signal processors, the
AD9807 can easily be implemented in imaging systems that do
not use a CCD. By disabling the input clamp and the CDS
blocks, any dc coupled signal within the input limits of the part
can be digitized. Figure 22 shows a typical block diagram of
the AD9807 used with a color CIS module, in this case Dyna
Image Corporation’s DL100. The three color output signals
are dc coupled into the AD9807. The Dyna CIS module’s
output levels are around 70 mV to 500 mV dark to bright, well
within the input range of the AD9807. The AD9807 is config-
ured for 3-channel SHA operation through the MPU registers.
Timing that was used with the Dyna DL100 is shown in Figure
23; the CIS output levels are sampled on the falling edge of
CDSCLK1. The digital ASIC shown can be implemented a
variety of ways; it could include the MPU interface and timing
generator, as well as memory for the output data and pixel gain
and offset correction vectors.
Figure 22. CIS Application Diagram (Power, Ground, and
Decoupling Omitted)
REV. 0
CIS
CLOCKS
CIS
GREEN
BLUE
RED
GENERATOR
VING
VINR
VINB
STRTLN,
CDSCLK1,
ADCCLK
TIMING
3
AD9807
GAIN<11:0>
OFFSET<7:0>
12
8
CORRECTION
CORRECTION
DOUT<11:0>
OFFSET
PIXEL
GAIN
OEB, WRB
A2, A1, A0
MPU<7:0>
RDB, CSB
PIXEL
INTERFACE
7
12
MPU
DIGITAL
ASIC
8
OUTPUT
DATA
–19–
CIS START PULSE
CIS OUTPUT
CIS CLOCK
CDSCLK1
ADCCLK
STRTLN
Figure 23. CIS Application Timing Signals
AD9807

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