W83697UG Nuvoton Technology Corporation of America, W83697UG Datasheet - Page 23

• Manufacturer Part Number: W83697UG
• Description: IC LPC SUPER I/O 128-PQFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83697UG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V, 5V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant

6.2 Compatible PnP
6.2.1
In Compatible PnP, there are two ways to enter Extended Function and read or write the configuration
registers. HEFRAS (CR26 bit 6) can be used to select one out of these two methods of entering the
Extended Function mode as follows:
After Power-on reset, the value on RTSA# (pin 49) is latched by HEFRAS of CR26. In Compatible
PnP, a specific value (87h) must be written twice to the Extended Functions Enable Register (I/O port
address 2Eh or 4Eh). Secondly, an index value (02h, 07h-FFh) must be written to the Extended
Functions Index Register (I/O port address 2Eh or 4Eh same as Extended Functions Enable Register)
to identify which configuration register is to be accessed. The designer can then access the desired
configuration register through the Extended Functions Data Register (I/O port address 2Fh or 4Fh).
After programming of the configuration register is finished, an additional value (AAh) should be written
to EFERs to exit the Extended Function mode to prevent unintentional access to those configuration
registers. The designer can also set bit 5 of CR26 (LOCKREG) to high to protect the configuration
registers against accidental accesses.
The configuration registers can be reset to their default or hardware settings only by a cold reset (pin
MR = 1). A warm reset will not affect the configuration registers.
6.2.2
After a power-on reset, the W83697UF enters the default operating mode. Before the W83697UF
enters the extended function mode, a specific value must be programmed into the Extended Function
Enable Register (EFER) so that the extended function register can be accessed. The Extended
Function Enable Registers are write-only registers. On a PC/AT system, their port addresses are 2Eh
or 4Eh (as described in previous section).
6.2.3
After the extended function mode is entered, the Extended Function Index Register (EFIR) must be
loaded with an index value (02h, 07h-FEh) to access Configuration Register 0 (CR0), Configuration
Register 7 (CR07) to Configuration Register FE (CRFE), and so forth through the Extended Function
Data Register (EFDR). The EFIRs are write-only registers with port address 2Eh or 4Eh on PC/AT
systems; the EFDRs are read/write registers with port address 2Fh or 4Fh on PC/AT systems.
6.3 Configuration Sequence
To program W83697UF configuration registers, the following configuration sequence must be
followed:
(1). Enter the extended function mode
(2). Configure the configuration registers
(3). Exit the extended function mode
Extended Function Registers
HEFRAS
Extended Functions Enable Registers (EFERs)
Extended Function Index Registers (EFIRs), Extended Function Data Registers
(EFDRs)
0
1
write 87h to the location 2Eh twice
write 87h to the location 4Eh twice
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ADDRESS AND VALUE
W83697UF/W83697UG
Publication Release Date: May 26, 2005
Revision A1