PI7C9X20508GPBNDE Pericom Semiconductor, PI7C9X20508GPBNDE Datasheet - Page 13

IC PCIE PACKET SWITCH 256BGA

PI7C9X20508GPBNDE

Manufacturer Part Number
PI7C9X20508GPBNDE
Description
IC PCIE PACKET SWITCH 256BGA
Manufacturer
Pericom Semiconductor
Series
GreenPacket™r

Specifications of PI7C9X20508GPBNDE

Applications
Data Transport
Interface
Advanced Configuration Power Interface (ACPI)
Package / Case
256-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-

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3.3 HOT PLUG SIGNALS
3.4 MISCELLANEOUS SIGNALS
June 2009 – Revision 1.5
Pericom Semiconductor
NAME
HOTPLUG [4:1]
SLOTCLK [4:0]
NAME
PWR_IND [4:1]
ATT_IND [4:1]
ATT_BTN [4:1]
MRL_PDC [4:1]
PWR_ENA_L [4:1]
PWR_FLT [4:1]
NAME
EECLK
EEPD
SMBCLK
SMBDATA
SCAN_EN
L7, N7, P7,
L8, M8, P8,
L9, N9, P9,
T4
*R6, H2, H1,
H4
*P6, J3, J1,
H5, H3
T7, *P6, *R6,
*T6
R7
R8
R9
M10, N10,
R10, T10
M11, N11,
P11, R11
R14
P14
T5
N14
PIN
PIN
PIN
TYPE
TYPE
TYPE
I/O
I/O
I/O
O
O
O
O
I
I
I
I
I
I
Page 13 of 81
DESCRIPTION
Hot Plug Capability: It determines if the downstream port is able to
support hot plug capability. HOTPLUG [x] is correspondent to Portx,
where x=1,2,3,4. When HOTPLUG [x] is high, Portx supports hot plug
operation. The strapping pin HOTPLUG[4] is shared with
PWR_IND[2]. By default, downstream Port1, Port2, Port3, and Port4
are equipped with hot plug function. Pins are set to “1110” by default.
HOTPLUG[4] has internal pull-down, and HOTPLUG[3:1] have
internal pull-up.
Slot Clock Configuration: It determines if the downstream
component uses the same physical reference clock that the platform
provides on the connector. When SLOTCLK is high, the platform
reference clock is employed. The strapping pin SLOTCLK[4] is shared
with PWR_IND[3]. By default, downstream Port1, Port2, Port3, and
Port4 use the same physical reference clock provided by platform. Pins
are set to “11110” by default. SLOTCLK[4] has internal pull-down,
and SLOTCLK[3:0] have internal pull-up.
DESCRIPTION
Power Indicator: Indicates the power status for each slot at
downstream port. PWR_IND [x] is correspondent to Port x, where
x=1,2,3,4. They are active-high signals. The pins have internal pull-
down.
Attention Indicator: Indicates the attention status for each slot at
downstream port. ATT_IND [x] is correspondent to Port x, where
x=1,2,3,4. They are active-high signals. Pins are set to “0000” by
default. ATT_IND [4] should be tied to ground through a 47K pull-
down resistors to disable the internal test function. ATT_IND[4:2]
have internal pull-down.
Attention Button: When asserted high, it represents the attention
button has been pressed for the slot at the downstream port. ATT_BTN
[x] is correspondent to Port x, where x=1,2,3,4.
Presence Detected Change: When asserted low, it represents the
device is present in the slot of downstream ports. Otherwise, it
represents the absence of the device. MRL_PDC [x] is correspondent
to Port x, where x=1,2,3,4.
SLOT Power Enable (Active LOW): Indicates the enable status of
the power connecting to the associated slot. PWR_ENA [x] is
correspondent to Portx, where x=1,2,3,4. They are active-low signals.
Pins are set to “0000” by default.
SLOT Power Fault: When asserted high, it indicates a power fault on
one or more supply rails. PWR_FLT [x] is correspondent to Port x,
where x=1,2,3,4.
DESCRIPTION
EEPROM Clock: Clock signal to the EEPROM interface.
EEPROM Data: Bi-directional serial data interface to and from the
EEPROM. The pin has internal pull-up.
SM Bus Clock: System management Bus Clock. Pin has an internal
pull-down.
SM Bus Data: Bi-Directional System Management Bus Data.
Full-Scan Enable Control: For normal operation, SCAN_EN is an
output with a value of “0”. SCAN_EN becomes an input during
manufacturing testing.
5Port-8Lane PCI Express Switch
GreenPacket
PI7C9X20508GP
Datasheet
TM
Family

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