MIC25400YML TR Micrel Inc, MIC25400YML TR Datasheet - Page 10

• Manufacturer Part Number: MIC25400YML TR
• Description: IC REG PWM SYNC BUCK 2A 24MLF
• Manufacturer: Micrel Inc
• Series: -r

Specifications of MIC25400YML TR

• Pwm Type: Voltage Mode
• Number Of Outputs: 2
• Frequency - Max: 1.2MHz
• Duty Cycle: 75%
• Voltage - Supply: 4.5 V ~ 13.2 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 24-VFQFN Exposed Pad, 24-MLF®
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 576-3902-2

Soft-start
Enable and soft-start waveforms are shown in Figure 2.
A capacitor, C
C
allows an internal current source to charge the capacitor.
The delay between the EN/DLY pin release and when
V
below.
Where:
C
I
V
starts to rise (1.35V nominal).
The output voltage starts to rise when voltage on the
EN/DLY pin reaches the start threshold. The output
voltage reaches regulation when the EN/DLY pin voltage
reaches the end threshold. The output voltage rise time
can be calculated by the equation below:
Where:
V
reaches regulation.
Power Good
Power good is an open drain signal that asserts when
V
monitors the FB pin. The internal FET is turned on while
the FB voltage is below the FB threshold. When voltage
on the FB in exceeds the FB threshold, the FET is
turned off. A pull-up resistor can be connected to P
and external source. The external source voltage must
not exceed the maximum rating of the pin. The PG pin
can be connected to another regulator’s EN/DLY pin for
sequencing of the outputs. A pull-up resistor is not used
when the power good pin is connected to another
regulators EN/DLY pin.
SS
Micrel, Inc.
January 2011
OUT
Threshold_start
Threshold_End
OUT
SS
SS
is the internal soft-start current (200µA nominal).
is the soft-start capacitor.
capacitor range is 4.7nf to 22nf. Releasing the pin
starts to rise can be calculated by the equation
exceed the power good threshold. The circuit
t
t
D
D
Figure 2. Soft-start Timing Diagram
=
=
is the EN/DLY pin voltage where the output
is the EN/DLY pin voltage where the output
C
C
SS
SS
SS
, is connected to the EN/DLY pin. The
×
×
(V
V
Threshold_
I
Threshold_
SS
Start
I
End
SS
−
V
Threshold_
Start
)
VDD
or
10
Output Sequencing
Sequencing of the outputs is shown in Figure 3. The
power good pin is used to disable V
reaches regulation. Sequencing waveforms are shown in
Figure 4.
The MIC25400 must start up without a pre-biased output
voltage. During start up, the MIC25400 pulls the output
to ground if it is above 0V. This may cause the output to
ring below ground and excessive voltage on the VSW
node. A pre-bias condition can occur if the output is
turned off then immediately turned back on before the
output capacitor is discharged to ground. It is also
possible that the output of the MIC25400 could be pulled
up or pre-biased through parasitic conduction paths from
one supply rail to another in multiple voltage level ICs
like a FPGA.
Figure 4. Output Sequencing Waveforms
Figure 3. Output Sequencing
OUT2
M9999-020111-C
until the V
MIC25400
OUT1