MAX14502AETL+ Maxim Integrated Products, MAX14502AETL+ Datasheet - Page 28

IC CARD READER USB-SD 40-TQFN

MAX14502AETL+

Manufacturer Part Number
MAX14502AETL+
Description
IC CARD READER USB-SD 40-TQFN
Manufacturer
Maxim Integrated Products
Type
Smart Card Interface ICr
Datasheet

Specifications of MAX14502AETL+

Applications
USB
Interface
I²C
Voltage - Supply
1.8 V ~ 3.3 V
Package / Case
40-TQFN Exposed Pad
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Hi-Speed USB-to-SD Card
Readers with Bypass
Figure 14. Bit Transfer
Figure 15. Acknowledge
Figure 16. Slave Address
One data bit is transferred during each clock pulse
(Figure 14). The data on SDA must remain stable while
SCL is high.
The acknowledge bit is a clocked 9th bit (Figure 15),
which the recipient uses to handshake receipt of each
byte of data. Each byte transferred effectively requires
nine bits. The master generates the 9th clock pulse,
and the recipient pulls down SDA during the acknow-
ledge clock pulse. The SDA line is stable low during the
high period of the clock pulse. When the master is
transmitting to the MAX14500–MAX14503, the
MAX14500–MAX14503 generate the acknowledge bit
because the MAX14500–MAX14503 are the recipients.
When the MAX14500–MAX14503 are transmitting to the
master, the master generates the acknowledge bit
because the master is the recipient.
28
______________________________________________________________________________________
TRANSMITTER
SDA
SCL
RECEIVER
SCL
SDA
SDA
SDA
SCL
BY
BY
MSB
1
CONDITION
START
S
1
DATA LINE STABLE;
DATA VALID
1
1
Acknowledge
Bit Transfer
0
CHANGE OF DATA
ALLOWED
2
0
The MAX14500–MAX14503 have a 7-bit long slave
address. The bit following the 7-bit slave address is the
R/W bit, which is low for a write command and high for
a read command. The address bit ADD is externally
driven high or low by the ADD input to select between
two slave addresses to avoid conflict with other I
addresses (Figure 16). Table 4 shows the binary values
for reads and writes.
Table 4. Slave Addresses
ADD
GND
GND
High
High
0
FUNCTION
Read
Read
Write
Write
ADD
8
CLOCK PULSE FOR
ACKNOWLEDGE
1
1
1
1
LSB
R/W
1
1
1
1
DEVICE ADDRESS
1
1
1
1
9
0
0
0
0
ACK
Slave Addresses
0
0
0
0
0
0
0
0
1
1
0
0
2
1
0
1
0
C

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