UJA1065TW/3V3,518 NXP Semiconductors, UJA1065TW/3V3,518 Datasheet - Page 63
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UJA1065TW/3V3,518
Manufacturer Part Number
UJA1065TW/3V3,518
Description
IC CAN/LIN FAIL-SAFE 32HTSSOP
Manufacturer
NXP Semiconductors
Datasheet
1.UJA1065TW3V3CT.pdf
(76 pages)
Specifications of UJA1065TW/3V3,518
Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Applications
Networking
Interface
CAN, LIN
Voltage - Supply
5.5 V ~ 52 V
Mounting Type
Surface Mount
Product
Controller Area Network (CAN)
Number Of Transceivers
1
Data Rate
20 Kbps
Supply Voltage (max)
27 V, 52 V
Supply Voltage (min)
5.5 V
Supply Current (max)
10 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4373-2
935281291518
UJA1065TW/3V3-T
UJA1065TW/3V3-T
935281291518
UJA1065TW/3V3-T
UJA1065TW/3V3-T
NXP Semiconductors
Table 27.
T
voltages are defined with respect to ground. Positive currents flow into the IC.
UJA1065_7
Product data sheet
Symbol
t
t
LIN transceiver; pins LIN, TXDL and RXDL
δ1
δ2
δ3
δ4
t
t
t
t
t
t
Battery monitoring
t
t
off-line
off-line(ext)
p(rx)
p(rx)(sym)
BUS(LIN)
LIN(dom)(det)
LIN(dom)(rec)
TXDL(dom)(dis)
BAT42(L)
SENSE(L)
vj
=
−
40
°
C to +150
Dynamic characteristics
Parameter
maximum time before
entering Off-line mode
extended minimum time
before entering Off-line
mode
duty cycle 1
duty cycle 2
duty cycle 3
duty cycle 4
propagation delay of
receiver
symmetry of receiver
propagation delay
minimum dominant time for
wake-up of the
LIN-transceiver
continuously dominant
clamped LIN-bus detection
time
continuously dominant
clamped LIN-bus recovery
time
TXDL permanent dominant
disable time
BAT42 LOW time for setting
PWONS
BAT42 LOW time for setting
BATFI
°
C; V
BAT42
= 5.5 V to 52 V; V
…continued
Conditions
On-line or On-line Listen mode;
TXDC = V
0; no bus activity
On-line or On-line Listen mode;
TXDC = V
1; no bus activity
On-line or On-line Listen mode
after CAN wake-up event;
TXDC = V
activity
[3]
V
V
LSC = 0; t
V
V
V
LSC = 0; t
V
V
V
LSC = 1; t
V
V
V
LSC = 1; t
V
C
rising edge with respect to
falling edge; C
Off-line mode
Active mode; LIN = 0 V
Active mode
Active mode; TXDL = 0 V
th(reces)(max)
th(dom)(max)
BAT42
th(reces)(min)
th(dom)(min)
BAT42
th(reces)(max)
th(dom)(max)
BAT42
th(reces)(min)
th(dom)(min)
BAT42
RXDL
Rev. 07 — 25 February 2010
BAT14
= 20 pF
= 7 V to 18 V
= 7.6 V to 18 V
= 7 V to 18 V
= 7.6 V to 18 V
= 5.5 V to 27 V; V
V1
V1
bit
bit
bit
bit
V1
= 0.284 × V
= 0.251 × V
; V2D = 1; COTC =
; V2D = 1; COTC =
; V2D = 1; no bus
= 0.581 × V
= 0.616 × V
= 50 μs;
= 50 μs;
= 96 μs;
= 96 μs;
= 0.422 × V
= 0.389 × V
= 0.744 × V
= 0.778 × V
RXDL
= 20 pF
High-speed CAN/LIN fail-safe system basis chip
BAT42
BAT42
BAT42
BAT42
BAT42
BAT42
BAT42
BAT42
BAT42
;
;
;
;
;
;
;
;
[1]
≥
[4]
[5]
[4]
[5]
V
BAT14
Min
50
200
400
0.396
-
0.417
-
-
−2
30
40
20
5
5
0.8
−
1 V; unless otherwise specified. All
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
UJA1065
© NXP B.V. 2010. All rights reserved.
Max
66
265
530
-
0.581
-
0.590
6
+2
150
160
2.2
80
20
20
63 of 76
Unit
ms
ms
ms
μs
μs
μs
ms
ms
ms
μs
μs