UJA1065TW/3V3,518 NXP Semiconductors, UJA1065TW/3V3,518 Datasheet - Page 7
![IC CAN/LIN FAIL-SAFE 32HTSSOP](/photos/6/94/69422/uja1065_hq_sml.jpg)
UJA1065TW/3V3,518
Manufacturer Part Number
UJA1065TW/3V3,518
Description
IC CAN/LIN FAIL-SAFE 32HTSSOP
Manufacturer
NXP Semiconductors
Datasheet
1.UJA1065TW3V3CT.pdf
(76 pages)
Specifications of UJA1065TW/3V3,518
Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Applications
Networking
Interface
CAN, LIN
Voltage - Supply
5.5 V ~ 52 V
Mounting Type
Surface Mount
Product
Controller Area Network (CAN)
Number Of Transceivers
1
Data Rate
20 Kbps
Supply Voltage (max)
27 V, 52 V
Supply Voltage (min)
5.5 V
Supply Current (max)
10 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4373-2
935281291518
UJA1065TW/3V3-T
UJA1065TW/3V3-T
935281291518
UJA1065TW/3V3-T
UJA1065TW/3V3-T
NXP Semiconductors
6. Functional description
UJA1065_7
Product data sheet
6.1 Introduction
6.2 Fail-safe system controller
The UJA1065 combines all peripheral functions around a microcontroller within typical
automotive networking applications into one dedicated chip. The functions are as follows:
The fail-safe system controller is the core of the UJA1065 and is supervised by a
watchdog timer that is clocked directly by the dedicated on-chip oscillator. The system
controller manages the register configuration and controls all internal functions of the
SBC. Detailed device status information is collected and presented to the microcontroller.
The system controller also provides the reset and interrupt signals.
The fail-safe system controller is a state machine. The different operating modes and the
transitions between these modes are illustrated in
further details about the SBC operating modes.
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Power supply for the microcontroller
Power supply for the CAN transceiver
Switched BAT42 output
System reset
Watchdog with Window mode and Time-out mode
On-chip oscillator
High-speed CAN and LIN transceivers for serial communication; suitable for 14 V and
42 V applications
SPI control interface
Local wake-up input
Inhibit or limp-home output
System inhibit output port
Compatibility with 42 V power supply systems
Fail-safe behavior
Rev. 07 — 25 February 2010
High-speed CAN/LIN fail-safe system basis chip
Figure
3. The following sections give
UJA1065
© NXP B.V. 2010. All rights reserved.
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