MC33394DH Freescale Semiconductor, MC33394DH Datasheet - Page 32

• Manufacturer Part Number: MC33394DH
• Description: IC POWER SUPPLY MULT-OUT 44-HSOP
• Manufacturer: Freescale Semiconductor

Specifications of MC33394DH

• Applications: Motorola MPC55x, MPC56x Microprocessors
• Interface: SPI Serial
• Voltage - Supply: 4 V ~ 26.5 V
• Package / Case: 44-BSOP (0.433", 11.00mm Width) Exposed Pad
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

5.3. Selecting Pull–Up Resistors
are open drain outputs, which can sink a maximum of 1 mA
drain current. This determines the pull–up resistor minimum
value. VKAM should be used as the pull–up source for the
/PORESET output. /PORESET is pulled low only during
initial battery connect or when VKAM is below 2.5 volts (for
VDDL = 2.6 V).
connections, consider current draw during sleep modes. For
example, the pull up resistor on /PRERESET and /HRESET
should receive its source from VDDL, if the sleep mode or low
power mode of the module is initiated primarily by the state of
the VIGN pin. Refer to Figure 20 for recommended pull–up
resistor values.
pull–up resistors is to connect them to the VKAM output
together with the /PORESET pull–up resistor (see Figure 1).
This is the preferable solution when the sleep or low power
mode is initiated primarily by the microprocessor. In that
case, when the 33394 is shut down by pulling the /SLEEP pin
down, all three Resets (/PORESET, /PRERESET and
/HRESET) stay high. Since they are pulled–up to the supply
voltage (VKAM) they draw no current from the VKAM and the
module quiescent current is minimized.
5.4. Selecting Hardware Reset Timer Components
and VDDL stable to the release of /PRERESET and
/HRESET. When sizing the delay time the module design
engineer must consider capacitor leakage, printed board
leakage and HRT pin leakage. Resistor selection should be
low enough to make the leakage currents negligible. The
Hardware Reset (/HRESET) delay can be calculated as
follows:
Delay time:
Part number
32
All the Resets (/PORESET, /PRERESET and /HRESET)
To select the /PRERESET and /HRESET pull–up resistor
Another way to connect the /PRERESET and /HRESET
The HRT input sets the delay time from VDDH, VDD3_3
(Figure 18)
R1
R2
R3
C1
C2
C3
t D
+ *
RC
part number (Figure 1)
Application diagram
33394 internal resistor
ln[
(V B
Table 2.
R2
R1
C6
C7
C5
(V B
*
V SAT )
*
Freescale Semiconductor, Inc.
V SAT )
For More Information On This Product,
*
V th
Component value
]
Go to: www.freescale.com
39.6k
100k
100pF
1.0nF
3.3nF
430
33394
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
Where R is the HRT timer pull–up resistor,
nominal value),
transistor.
(see Figure 1) and the resistor value is 47 k
V SAT can be neglected, the formula for calculating the time
delay can be simplified to:
5.5. Selecting the VKAM Resistor Divider
external resistor divider and compared with the bandgap
reference voltage (V bg ) in the input of the VKAM error
amplifier. The resistor divider can be designed according to
the following formula:
V KAMref = 1.267 V
Where V KAMref is the bandgap reference voltage.
only a few nA, the resistor value can be selected sufficiently
high in order to minimize the quiescent current of the module.
See Figure 20 for the VKAM resistor divider recommended
values.
5.6. Selecting the VDDL Resistor Divider
to the same formula as described in the paragraph above
(see Figure 20).
Where V DDLref = 1.267 V
several decades lower than in the previous example. This is
due to the fact that the VDDL linear regulator needs to be
pre–loaded by a minimum of 10 mA current in order to
guarantee stable operation. See Figure 20 for the VDDL
resistor divider recommended values.
If the HRT timer pull–up resistor is connected to VDDH
The VKAM linear regulator output voltage is divided by an
Since the VKAM feedback pin (VKAM_FB) input current is
The VDDL regulator resistor divider is designed according
Nonetheless, the actual resistor values should be chosen
C is the HRT timer capacitor
V B is the pull–up voltage,
V th is the HRT timer threshold voltage (V th = 2.5V
V SAT is the saturation voltage of the internal pull–down
V DDL
V KAM
+
+
t D
V DDLref
V KAMref
+
0.7
RC
1
1
)
)
R upper
R lower
R upper
R lower
W
, therefore the