EVALAD7762EB Analog Devices Inc, EVALAD7762EB Datasheet - Page 4

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EVALAD7762EB

Manufacturer Part Number
EVALAD7762EB
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVALAD7762EB

Lead Free Status / Rohs Status
Not Compliant
EVAL-AD7760/AD7762/AD7763EDZ
LINK OPTIONS
The link options on the evaluation board should be set for the required operating setup before using the board. The functions of these
links are described in Table 1.
Table 1. Link Options
Link No.
LK1
LK2
LK3
LK4
LK5
R9, R10
Function
Selects the V
Clock Buffers U16 and U2.
Selects the voltage supply to
power the FPGA outputs.
Output enable for Data
Buffers U13 and U17
FPGA enable.
Selects the input/output voltage
for Data Buffers U13 and U17.
A 0 Ω link must be placed in
either R9 or R10 to select the
MCLK source for the
AD7760/AD7762/AD7763
device.
DD
voltage for
Position Descriptions
Position A selects V
Position B selects V
Position A – Null. Do not use this position.
Position B digital drive voltage for the FPGA is taken from the EVAL-AD776xEDZ
DVDD supply.
Position A selects the DVDD supply: outputs permanently enabled.
Position B CS controls the data buffer outputs.
Position C Selects GND, outputs disabled.
Position A connects Pin 43 of the FPGA to GND. This sends all the pins of the FPGA
device to three-state so that the FPGA can be bypassed.
Position B connects Pin 43 of the FPGA to logic high 2.5 V. The FPGA is now fully
operational. This link must be in Position B for the evaluation board to function
with the EVAL-CED1Z.
Position A selects DVDD supply from the EVAL-AD776xEDZ.
Position B selects External Voltage Connector J14 to provide this voltage.
R9 routes the buffered 40 MHz on-board crystal oscillator to the MCLK pin of
the AD7760/AD7762/AD7763 device.
R10 allows the user to input an external MCLK signal through the MCLK SMB
connector (J8), which is buffered (by U2) and routed to the MCLK pin of the
AD7760/AD7762/AD7763 device.
Rev. PrA | Page 4 of 24
DD
DD
= 2.5 V
= 5 V. Achieves maximum performance.
Preliminary Technical Data
Default
Position A
Position B
Position A
Position B
Position A
R9