ADSP-21266SKSTZ-2C Analog Devices Inc, ADSP-21266SKSTZ-2C Datasheet - Page 20

ADSP-21266SKSTZ-2C

Manufacturer Part Number
ADSP-21266SKSTZ-2C
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADSP-21266SKSTZ-2C

Device Core Size
32b
Architecture
Super Harvard
Format
Floating Point
Clock Freq (max)
200MHz
Mips
200
Device Input Clock Speed
200MHz
Ram Size
256KB
Program Memory Size
512KB
Operating Supply Voltage (typ)
1.2/3.3V
Operating Supply Voltage (min)
1.14/3.13V
Operating Supply Voltage (max)
1.26/3.47V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / Rohs Status
Compliant

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ADSP-21261/ADSP-21262/ADSP-21266
Core Timer
The timing specification in
FLAG3 when it is configured as the core timer (CTIMER).
Table 19. Core Timer
Timer PWM_OUT Cycle Timing
The timing specification in
Timer in PWM_OUT (pulse-width modulation) mode. Timer
signals are routed to the DAI_P20–1 pins through the SRU.
Therefore, the timing specifications provided below are valid at
the DAI_P20–1 pins.
Table 20. Timer PWM_OUT Timing
Parameter
Switching Characteristics
t
Parameter
Switching Characteristics
t
WCTIM
PWMO
(C TIM E R )
DAI_P20–1
(TIMER)
F L G 3
Timer Pulse Width Output
CTIMER Pulse Width
Table 19
Table 20
and
and
Figure 10
Figure 11
applies to
applies to
Figure 11. Timer PWM_OUT Timing
Rev. F | Page 20 of 44 | July 2009
Figure 10. Core Timer
Min
2 t
Min
4 × t
CCLK
t
PWMO
– 1
CCLK
t
W C T IM
– 1
Max
2(2
31
– 1) t
Max
CCLK
Unit
ns
Unit
ns

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