ADG708BRU Analog Devices Inc, ADG708BRU Datasheet - Page 10

• Manufacturer Part Number: ADG708BRU
• Description: IC MULTIPLEXER 8X1 16TSSOP
• Manufacturer: Analog Devices Inc
• Type: Analog Multiplexerr

Specifications of ADG708BRU

• Rohs Status: RoHS non-compliant
• Function: Multiplexer
• Circuit: 1 x 8:1
• On-state Resistance: 4.5 Ohm
• Voltage Supply Source: Single, Dual Supply
• Voltage - Supply, Single/dual (±): 1.8 V ~ 5.5 V, ±2.5 V
• Current - Supply: 0.001µA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP (0.173", 4.40mm Width)
• No. Of Channels: 8
• Analog Switch Case Style: TSSOP
• No. Of Pins: 16
• Single Supply Voltage Min (+v): 1.8V
• Analog Multiplexer Type: Single 8 X 1
• Peak Reflow Compatible (260 C): No
• Leakage Current: 0.01nA
• Multiplexer Configuration: Single 8:1
• Number Of Inputs: 8
• Number Of Outputs: 1
• Number Of Channels: 1
• Analog Switch On Resistance: 11@3VOhm
• Analog Switch Turn On Time: 18ns
• Analog Switch Turn Off Time: 8ns
• Package Type: TSSOP
• Power Supply Requirement: Single/Dual
• Single Supply Voltage (min): 1.8V
• Single Supply Voltage (typ): 3/5V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (typ): ±2.5V
• Power Dissipation: 432mW
• Supply Current: 0.001mA
• Mounting: Surface Mount
• Pin Count: 16
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Package: 16TSSOP
• Maximum On Resistance: 11@3V Ohm
• Maximum Propagation Delay Bus To Bus: 14(Typ)@5V|18(Typ)@3V|14(Typ)@±2.5V ns
• Maximum High Level Output Current: 30 mA
• Multiplexer Architecture: 8:1
• Maximum Turn-off Time: 8(Typ)@3V ns
• Maximum Turn-on Time: 18(Typ)@3V ns
• Power Supply Type: Single|Dual
• Lead Free Status / Rohs Status: Not Compliant

ADG708/ADG709
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 5. ADG708 Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Table 6. ADG709 Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
A0
EN
V
S1
S2
S3
S4
D
S8
S7
S6
S5
V
GND
A2
A1
Mnemonic
A0
EN
V
S1A
S2A
S3A
S4A
DA
DB
S4B
S3B
S2B
S1B
V
GND
A1
SS
DD
SS
DD
Figure 3. ADG708 Pin Configuration
V
EN
A0
S1
S2
S3
S4
SS
D
1
2
3
4
5
6
7
8
(Not to Scale)
ADG708
TOP VIEW
Description
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 7).
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 7).
Most Negative Power Supply Pin in Dual-Supply Applications. For single-supply applications, it should be tied to GND.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Drain Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Most Positive Power Supply Pin.
Ground (0 V) Reference.
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 7).
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 7).
Description
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 8).
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 8).
Most Negative Power Supply Pin in Dual-Supply Applications. For single-supply applications, it should be tied to GND.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Drain Terminal. Can be an input or output.
Drain Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Most Positive Power Supply Pin.
Ground (0 V) Reference.
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 8).
15
14
13
12
11
10
16
9
A1
A2
GND
V
S5
S6
S7
S8
DD
Rev. C | Page 10 of 20
Figure 4. ADG709 Pin Configuration
S1A
S2A
S3A
S4A
V
DA
EN
A0
SS
1
2
3
4
5
6
7
8
(Not to Scale)
ADG709
TOP VIEW
15
14
13
12
11
10
16
9
A1
GND
V
S1B
S2B
S3B
S4B
DB
DD