MAX5982CETE+ Maxim Integrated Products, MAX5982CETE+ Datasheet - Page 14

no-image

MAX5982CETE+

Manufacturer Part Number
MAX5982CETE+
Description
Power Switch ICs - POE / LAN PDIC, up to 70W
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5982CETE+

Lead Free Status / Rohs Status
 Details
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with
Careful PCB layout is critical to achieve high efficiency
and low EMI. Follow these layout guidelines for optimum
performance:
1) Place the input capacitor, classification resistor, and
Figure 2. Typical Configuration When Using a 12V Wall Power Adapter
14
-54V
RECTIFIER
WALK MODE
BRIDGE
transient voltage suppressor as close as possible to
the MAX5982A/MAX5982B/MAX5982C.
RJ-45
AND
_____________________________________________________________________________________
INPUT
SMAJ58A
GND
-54V
Applications Information
24.9kI
68nF
R
R
Operation with 12V Adapter
CLS
DET
CLS
DET
V
LED
WK
SS
V
DD
MAX5982C
MAX5982A
MAX5982B
MAX5982A/MAX5982B ONLY
Integrated 70W High-Power MOSFET
Layout Procedure
2EC/WAD
I.5mA
2EC
PG
SL
ULP
WAD
RTN
BATTERY
2) Use large SMT component pads for power dissipat-
3) Use short and wide traces for high-power paths.
4) Place enough vias in the pad for the EP of the
60.4kI
12V
CLASSIFICATION
(ASSERTED ON)
ing devices such as the MAX5982A/MAX5982B/
MAX5982C and the external diodes.
MAX5982A/MAX5982B/MAX5982C so that heat gen-
erated inside can be effectively dissipated by the
PCB copper. The recommended spacing for the vias
is 1mm to 1.2mm pitch. The thermal vias should be
plated (1oz copper) and have a small barrel diameter
(0.3mm to 0.33mm).
2-EVENT
-54V
PROPER 2EC LOGIC WHEN
THIS CIRCUIT ACHIEVES
-54V
BATTERY IS < 12.5V
ULTRA-LOW-POWER
1kI
ISOLATED SLEEP
MODE INPUT
SLEEP
ENABLE
CONVERTER
DC-DC
IN+
IN-
GND

Related parts for MAX5982CETE+