MAX5982CETE+ Maxim Integrated Products, MAX5982CETE+ Datasheet - Page 2

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MAX5982CETE+

Manufacturer Part Number
MAX5982CETE+
Description
Power Switch ICs - POE / LAN PDIC, up to 70W
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5982CETE+

Lead Free Status / Rohs Status
 Details
Note 1: Maximum power dissipation is obtained using JEDEC JESD51-5 and JESD51-7 specifications.
IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with
ABSOLUTE MAXIMUM RATINGS
V
DET, RTN, WAD, PG, 2EC to V
CLS, SL, WK, ULP, LED to V
Maximum Current on CLS (100ms maximum) .................100mA
Continuous Power Dissipation (T
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS(Note 2)
TQFN
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
ELECTRICAL CHARACTERISTICS
(V
voltages are referenced to V
T
2
DD
A
DETECTION MODE
Input Offset Current
Effective Differential Input
Resistance
CLASSIFICATION MODE
Classification Disable
Threshold
Classification Stability Time
Classification Current
TYPE 2 (802.3at) CLASSIFICATION MODE
Mark Event Threshold
Hysteresis on Mark Event
Threshold
Mark Event Current
Reset Event Threshold
IN
TQFN (derate 28.6mW/NC above +70NC)
Multilayer Board .....................................................2285.7mW
Junction-to-Ambient Thermal Resistance (q
Junction-to-Case Thermal Resistance ( B
= +25
______________________________________________________________________________________
= (V
to V
SS
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
DD
N
PARAMETER
C.) (Note 3)
..........................................................-0.3V to +100V
- V
SS
) = 48V, R
DET
SS
SS,
SS
...............................-0.3V to +6V
A
= 24.9kω, R
unless otherwise noted. T
....................... -0.3V to +100V
= +70NC) (Note 1)
SYMBOL
V
I
I
OFFSET
I
CLASS
V
TH,CLS
V
MARK
dR
THM
THR
Integrated 70W High-Power MOSFET
JC
) ..............2.7NC/W
CLS
JA
) ..........35°C/W
= 615ω, and R
V
V
V
V
V
20.5V, V
RTN = WAD =
PG = 2EC
V
V
P 10.1V
V
IN
IN
DD
IN
IN
IN
IN
IN
rising (Note 6)
= 1.4V to 10.1V (Note 4)
= 1.4V up to 10.1V with 1V step,
= 12.5V to
falling
falling to enter mark event, 5.2V P V
falling
= RTN = WAD = PG = 2EC (Note 5)
DD
A
= T
=
CONDITIONS
J
SL
= -40
= 60.4kω. RTN, WAD, PG, 2EC, WK, and ULP unconnected, all
Operating Temperature Range .......................... -40NC to +85NC
Maximum Junction Temperature .....................................+150NC
Storage Temperature Range ............................ -65NC to +150NC
Lead Temperature (soldering, 10s) .............................. +300NC
Soldering Temperature (reflow) .................................... +260NC
Class 0, R
Class 1, R
Class 2, R
Class 3, R
Class 4, R
Class 5, R
N
C to +85
CLS
CLS
CLS
CLS
CLS
CLS
N
C, unless otherwise noted. Typical values are at
= 615I
= 117I
= 66.5I
= 43.7I
= 30.9I
= 21.3I
IN
23.95
22.0
9.12
17.2
26.3
36.4
52.7
10.1
0.25
MIN
2.8
0
25.00
TYP
22.8
10.7
0.82
0.2
3.8
25.50
11.88
MAX
23.6
3.96
19.8
29.7
43.6
63.3
11.6
0.85
5.2
10
UNITS
mA
mA
kI
ms
FA
V
V
V
V

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