AT45DB161D-SU-2.5 SL383 Atmel, AT45DB161D-SU-2.5 SL383 Datasheet - Page 29

• Manufacturer Part Number: AT45DB161D-SU-2.5 SL383
• Manufacturer: Atmel

Specifications of AT45DB161D-SU-2.5 SL383

• Density: 16Mb
• Access Time (max): 6ns
• Interface Type: Serial (SPI)
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SOIC EIAJ
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Supply Current: 15mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / Rohs Status: Compliant

3500N–DFLASH–05/10
16.
16.1
17.
Power-on/Reset State
When power is first applied to the device, or when recovering from a reset condition, the device will default to Mode
3. In addition, the output pin (SO) will be in a high impedance state, and a high-to-low transition on the CS pin will
be required to start a valid instruction. The mode (Mode 3 or Mode 0) will be automatically selected on every falling
edge of CS by sampling the inactive clock state.
Initial Power-up/Reset Timing Restrictions
At power up, the device must not be selected until the supply voltage reaches the V
t
above the Power-on Reset threshold value (V
respond to any commands. After power up is applied and the V
the t
Similarly, the t
device can perform a write (Program or Erase) operation. After initial power-up, the device will default in Standby
mode.
Table 16-1.
System Considerations
The Atmel
signals must rise and fall monotonically and be free from noise. Excessive noise or ringing on these pins can be
misinterpreted as multiple edges and cause improper operation of the device. The PC board traces must be kept to
a minimum distance or appropriately terminated to ensure proper operation. If necessary, decoupling capacitors
can be added on these pins to provide filtering against noise glitches.
As system complexity continues to increase, voltage regulation is becoming more important. A key element of any
voltage regulation scheme is its current sourcing capability. Like all Flash memories, the peak current for Atmel
DataFlash
requirement. An under specified regulator can cause current starvation. Besides increasing system noise, current
starvation during programming or erase can lead to improper operation and possible data corruption.
VCSL
Symbol
t
t
V
VCSL
PUW
POR
VCSL
. During power-up, the internal Power-on Reset circuitry keeps the device in reset mode until the V
delay is required before the device can be selected in order to perform a read operation.
®
®
RapidS serial interface is controlled by the clock SCK, serial input SI and chip select CS pins. These
occur during the programming and erase operation. The regulator needs to supply this peak current
Parameter
V
Power-Up Device Delay before Write Allowed
Power-ON Reset Voltage
CC
PUW
Initial Power-up/Reset Timing Restrictions
(min.) to Chip Select low
delay is required after the V
POR
CC
rises above the Power-on Reset threshold value (V
). At this time, all operations are disabled and the device does not
CC
Min
1.5
70
is at the minimum operating voltage V
Typ
Atmel AT45DB161D
CC
Max
2.5
20
(min.) and further delay of
Units
ms
µs
V
POR
) before the
CC
CC
(min.),
rises
29