LH28F800BGN-BL12 Sharp Electronics, LH28F800BGN-BL12 Datasheet - Page 21

• Manufacturer Part Number: LH28F800BGN-BL12
• Manufacturer: Sharp Electronics

Specifications of LH28F800BGN-BL12

• Cell Type: NOR
• Density: 8Mb
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 19b
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temp Range: 0C to 70C
• Package Type: SOP
• Program/erase Volt (typ): 2.7/3.3/5/12V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7/4.5V
• Operating Supply Voltage (max): 3.6/5.5V
• Word Size: 16b
• Number Of Words: 512K
• Supply Current: 65mA
• Mounting: Surface Mount
• Pin Count: 44
• Lead Free Status / Rohs Status: Not Compliant

The CUI latches commands issued by system
software and is not altered by V
transitions or WSM actions. Its state is read array
mode upon power-up, after exit from deep power-
down or after V
After block erase or word write, even after V
transitions down to V
in read array mode via the Read Array command if
subsequent access to the memory array is desired.
5.6 Power-Up/Down Protection
The device is designed to offer protection against
accidental block erasure or word writing during
power transitions. Upon power-up, the device is
indifferent as to which power supply (V
powers-up first. Internal circuitry resets the CUI to
read array mode at power-up.
A system designer must guard against spurious
writes for V
active. Since both WE# and CE# must be low for a
command write, driving either to V
writes. The CUI’s two-step command sequence
architecture provides added level of protection
against data alteration.
RP# provide additional protection from inadvertent
code or data alteration. The device is disabled
while RP# = V
state.
CC
CC
voltages above V
IL
regardless of its control inputs
transitions below V
PPLK
, the CUI must be placed
LKO
LKO
IH
when V
PP
PP
will inhibit
.
or CE#
or V
PP
CC
PP
is
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)
5.7 Power Consumption
When designing portable systems, designers must
consider battery power consumption not only during
device operation, but also for data retention during
system idle time. Flash memory’s nonvolatility
increases usable battery life because data is
retained when system power is removed.
In addition, deep power-down mode ensures
extremely low power consumption even when
system power is applied. For example, portable
computing products and other power sensitive
applications that use an array of devices for solid-
state storage can consume negligible power by
lowering RP# to V
access is again needed, the devices can be read
following the t
required after RP# is first raised to V
6.2.4 through 6.2.6 "AC CHARACTERISTICS -
READ-ONLY and WRITE OPERATIONS" and
Fig. 11, Fig. 12 and Fig.13 for more information.
PHQV
LH28F800BG-L (FOR SOP)
IL
and t
standby or sleep modes. If
PHWL
wake-up cycles
IH
. See Section