LH28F008SCR-V85 Sharp Electronics, LH28F008SCR-V85 Datasheet - Page 33

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LH28F008SCR-V85

Manufacturer Part Number
LH28F008SCR-V85
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F008SCR-V85

Cell Type
NOR
Density
8Mb
Access Time (max)
85ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
20b
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
TSOP-I
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
1M
Supply Current
50mA
Mounting
Surface Mount
Pin Count
40
Lead Free Status / Rohs Status
Not Compliant

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6.2.6 ALTERNATIVE CE#-CONTROLLED WRITES
NOTES :
1. In systems where CE# defines the write pulse width
2. Sampled, not 100% tested.
3. Refer to Table 3 for valid A
4. V
SYMBOL
• V
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AVAV
PHEL
WLEL
ELEH
PHHEH
VPEH
AVEH
DVEH
EHDX
EHAX
EHWH
EHEL
EHRL
EHGL
QVVL
QVPH
CC
(within a longer WE# timing waveform), all setup, hold,
and inactive WE# times should be measured relative to
the CE# waveform.
byte write, or lock-bit configuration.
should be held at V
byte write, or lock-bit configuration success (SR.1/3/4/5 = 0).
PP
= 5.0±0.25 V, 5.0±0.5 V, T
should be held at V
Write Cycle Time
RP# High Recovery to CE#
Going Low
WE# Setup to CE# Going Low
CE# Pulse Width
RP# V
V
Address Setup to CE# Going High
Data Setup to CE# Going High
Data Hold from CE# High
Address Hold from CE# High
WE# Hold from CE# High
CE# Pulse Width High
CE# High to RY/BY# Going Low
Write Recovery before Read
V
RY/BY# High
RP# V
RY/BY# High
PP
PP
VERSIONS
Setup to CE# Going High
Hold from Valid SRD,
HH
HH
Setup to CE# Going High
PARAMETER
Hold from Valid SRD,
HH
) until determination of block erase,
PPH1/2
IN
and D
A
(and if necessary RP#
= 0 to +70˚C or –25 to +85
IN
V
V
for block erase,
CC
CC
±0.25 V
±0.5 V
NOTE
2, 4
2, 4
2
2
2
3
3
LH28F008SCH-V85
LH28F008SC-V85/
(NOTE 5)
MIN.
100
100
85
50
40
40
25
- 33 -
1
0
5
5
0
0
0
0
5. See Fig. 9 "Transient Input/Output Reference
6. See Fig. 10 "Transient Input/Output Reference
(NOTE 1)
MAX.
˚
C
90
Waveform" and Fig. 11 "Transient Equivalent Testing
Load Circuit" (High Seed Configuration) for testing
characteristics.
Waveform" and Fig. 11 "Transient Equivalent Testing
Load Circuit" (Standard Configuration) for testing
characteristics.
LH28F008SCH-V85
(NOTE 6)
LH28F008SC-V85/
MIN.
100
100
90
50
40
40
25
1
0
5
5
0
0
0
0
MAX.
90
LH28F008SC-V/SCH-V
LH28F008SCH-V12
(NOTE 6)
LH28F008SC-V12/
MIN.
120
100
100
40
50
40
25
1
0
5
5
0
0
0
0
MAX.
90
UNIT
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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