LH28F016SCHT-ZN Sharp Electronics, LH28F016SCHT-ZN Datasheet - Page 41
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LH28F016SCHT-ZN
Manufacturer Part Number
LH28F016SCHT-ZN
Description
Manufacturer
Sharp Electronics
Datasheet
1.LH28F016SCHT-ZN.pdf
(58 pages)
Specifications of LH28F016SCHT-ZN
Lead Free Status / Rohs Status
Compliant
- Current page: 41 of 58
- Download datasheet (660Kb)
6.2.7 RESET OPERATIONS
NOTES:
1. If RP# is asserted while a block erase, byte write, or lock-bit configuration operation is not executing, the reset
2. A reset time, t
3. When the device power-up, holding RP# low minimum 100ns is required after V
t
t
t
PLPH
PLRH
235VPH
Sym.
will complete within 100ns.
and also has been in stable there.
RP# Pulse Low Time
(If RP# is tied to V
specification is not applicable)
RP# Low to Reset during
Block Erase, Byte Write or
Lock-Bit Configuration
V
V
V
CC
CC
CC
2.7V to RP# High
3.0V to RP# High
4.5V to RP# High
RY/BY#(R)
RY/BY#(R)
PHQV
RP#(P)
RP#(P)
RP#(P)
Parameter
, is required from the latter of RY/BY# or RP# going high until outputs are valid.
V
CC
V
V
V
V
V
V
V
V
2.7V/3.3V/5V
V
V
V
OH
OL
OH
OL
IH
IL
IH
IL
IL
IH
IL
CC
, this
(B)Reset During Block Erase, Byte Write, or Lock-Bit Configuration
Figure 18. AC Waveform for Reset Operation
t
t
Notes
PLPH
PLPH
1,2
Reset AC Specifications
3
LHF16CZN
t
(A)Reset During Read Array Mode
Min.
235VPH
100
100
t
PLRH
V
CC
(C)RP# rising Timing
=2.7V
Max.
⎯
Min.
100
100
V
CC
=3.3V
Max.
20
CC
has been in predefined range
Min.
100
100
V
CC
=5V
Max.
12
Rev. 1.2
Unit
ns
µs
ns
38
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