LH28F640SPHT-PTLZ8 Sharp Electronics, LH28F640SPHT-PTLZ8 Datasheet - Page 22

LH28F640SPHT-PTLZ8

Manufacturer Part Number
LH28F640SPHT-PTLZ8
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F640SPHT-PTLZ8

Cell Type
NOR
Density
64Mb
Access Time (max)
120ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
22b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
4M
Supply Current
50mA
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LH28F640SPHT-PTLZ8
Manufacturer:
SHARP
Quantity:
5 000
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values are the reference values at V
2. CMOS inputs are either V
3. I
4. Block erase, (page buffer) program, block lock configuration and OTP program operations are inhibited when
5. The Automatic Power Savings (APS) feature automatically places the device in power save mode after read cycle
6. Sampled, not 100% tested.
7. V
8. Includes STS.
I
I
I
V
V
V
V
V
V
V
CCE
CCWS
CCES
Symbol
IL
IH
OL
OH
PENLK
PENH
LKO
T
erase suspend mode, the device’s current draw is the sum of I
buffer) program suspend mode, the device’s current draw is the sum of I
V
V
completion. Standard address access timings (t
and OTP program operations are inhibited.
CCWS
A
PEN
PEN
PEN
=+25°C unless V
≤V
=2.7V-3.6V).
is not used for power supply pin. With V
and I
V
Bits Current
V
Block Erase Suspend Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
V
V
(Page Buffer) Program, Set Block Lock
Bit, Clear Block Lock Bits or OTP
Program Operations
V
PENLK
Operations
CC
CC
PEN
PEN
CC
CCES
(Page Buffer) Program or
Lockout Voltage
Block Erase, Clear Block Lock
Lockout Voltage during Normal
or V
Voltage during Block Erase,
are specified with the device de-selected. If read or (page buffer) program is executed while in block
CC
CC
is specified.
≤V
Parameter
CCQ
LKO
±0.2V or GND±0.2V. TTL inputs are either V
. These operations are not guaranteed outside the specified voltage (V
DC Characteristics (Continued)
AVQV
PEN
1, 2, 6
1, 2, 6
4, 6, 7
≤V
Notes
V
1, 3
6, 8
6, 8
4, 7
) provide new data when addresses are changed.
LHF64PZ8
6
6
4
CC
PENLK
=2.7V-3.6V
V
V
0.85×
Min.
, block erase, (page buffer) program, block lock configuration
-0.5
-0.2
2.0
2.7
2.0
CCQ
CCQ
CCES
and I
Typ.
3.0
35
40
CCWS
CCR
IL
V
Max.
+ 0.5
or I
and I
or V
0.8
0.4
0.2
1.0
3.6
70
80
10
CCQ
CCW
IH
CCR
.
. If read is executed while in (page
.
Unit
mA
mA
mA
V
V
V
V
V
V
V
V
V
CC
CMOS Inputs,
V
TTL Inputs,
V
Device is disabled
V
V
I
V
V
I
V
V
I
V
V
I
OL
OL
OH
OH
=3.0V, V
PEN
PEN
(refer to Table 2).
CC
CCQ
CC
CCQ
CC
CCQ
CC
CCQ
=2mA
=100µA
=-1.5mA
=-100µA
Test Conditions
=V
=V
=V
=V
=V
=V
=V
=V
=V
=V
CC
CC
CC
CC
CC
PENH
PENH
=2.7V-3.6V and
CCQ
CCQ
CCQ
CCQ
CCQ
Min.,
Min.,
Min.,
Min.,
Rev. 0.06
Min.,
Min.,
Min.,
Min.,
=3.0V and
19

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