ADSP-2171KST-133 Analog Devices Inc, ADSP-2171KST-133 Datasheet - Page 19

• Manufacturer Part Number: ADSP-2171KST-133
• Manufacturer: Analog Devices Inc

Specifications of ADSP-2171KST-133

• Device Core Size: 16b
• Architecture: Enhanced Harvard
• Format: Fixed Point
• Clock Freq (max): 33.33MHz
• Mips: 33
• Device Input Clock Speed: 33.33MHz
• Ram Size: 10KB
• Program Memory Size: 24KB
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 128
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

REV. A
ADSP-2171/ADSP-2172
Parameter
Clock Signals
t
input clock with a frequency equal to half the instruction rate; a
clock (which is equivalent to 60 ns) yields a 30 ns processor cycle
16.67 MHz input (equivalent to 33 MHz). t
range of 0.5 t
timing parameters to obtain specification value.
Example: t
Timing Requirement:
t
t
t
Switching Characteristic:
t
t
t
Control Signals
Timing Requirement:
t
NOTE
1
CK
CKI
CKIL
CKIH
CKL
CKH
CKOH
RSP
Applies after power-up sequence is complete. Internal phase lock loop requires no more than 2000 CLKIN cycles assuming stable CLKIN (not including crystal
oscillator start-up time).
is defined as 0.5 t
CKH
CKI
= 0.5t
period should be substituted for all relevant
CLKIN Period
CLKIN Width Low
CLKIN Width High
CLKOUT Width Low
CLKOUT Width High
CLKIN High to CLKOUT High
RESET Width Low
CKI.
CK
– 7 ns = 0.5 (30 ns) – 7 ns = 8 ns.
The ADSP-2171/ADSP-2172 uses an
CLKOUT
CLKIN
CK
values within the
Figure 8. Clock Signals
t
CKIL
t
CKI
–19–
t
CKL
ADSP-2171/ADSP-2172/ADSP-2173
Min
60
20
20
0.5t
0.5t
0
5t
CK
CK
CK
1
– 7
– 7
t
t
CKOH
CKH
t
CKIH
Max
150
20
ns
ns
ns
ns
ns
ns
ns
Unit