CY7C374I-66JC Cypress Semiconductor Corp, CY7C374I-66JC Datasheet
CY7C374I-66JC
Specifications of CY7C374I-66JC
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CY7C374I-66JC Summary of contents
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... F ISR often allows users to change existing logic designs while simultaneously fixing pinout assignments. The 128 macrocells in the CY7C374i are divided between eight logic blocks. Each logic block includes 16 macrocells product term array, and an intelligent product term allocator ...
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... I I/O I/O V GND I I/O GND CLK0 I I/O I/O V ISR I/O I/O I/O I/O I/O GND I/O I/O I/O I GND CY7C374i GND I/O /SDI I/O 48 CLK / GND CCIO CLK / I I I/O ...
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... I/O I/O I/O I/O I/O GND Document #: 38-03031 Rev. *A TQFP Top View CLCC Top View CY7C374i SDI 74 V CCIO 73 I I CLK / GND CCIO CLK / I GND GND I/O /SDI 54 71 I I/O 51 ...
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... PIM regardless of its configuration. Programmable Interconnect Matrix The Programmable Interconnect Matrix (PIM) connects the eight logic blocks on the CY7C374i to the inputs and to each other. All inputs (including feedbacks) travel through the PIM. There is no speed penalty incurred by signals traversing the PIM ...
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... V = Min 0. Min 2. Max Max CCINT CY7C374i Ambient Temperature CCINT 5V ± 0.25V 5V ± 0.25V or 0°C to +70°C 3.3V ± 0.3V −40°C to +85°C 5V ± 0.5V 5V ± 0.5V or 3.3V ± 0.3V –55°C to +125°C 5V ± 0.5V Min. Typ. Max. [5] 2.4 [ ...
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... OUTPUT 236Ω (MIL INCLUDING JIG AND (b) SCOPE 2.08V (COM'L) 2.13V (MIL) Output Waveform Measurement Level V OH –0.5V –0. –0. –0.5V measured with 35-pF AC Test Load. EA CY7C374i Min. Max Max. 100 ALL INPUT PULSES 3.0V 90% 10% GND <2ns Max. EN Unit Unit ...
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... All AC parameters are measured with 16 outputs switching and 35-pF AC Test Load. 15. This specification is intended to guarantee interface compatibility of the other members of the CY7C370i family with the CY7C374i. This specification is met for the devices operating at the same ambient temperature and at the same power supply voltage. ...
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... Latched Output INPUT LATCH ENABLE LATCHED OUTPUT Document #: 38-03031 Rev. *A [14] 7C374i–125 Min. Max. [9] 10 [9] 12 [1] 16 [9] 10 [9] 12 [1] 16 500 PDL CY7C374i 7C374i–83 7C374i–66 7C374i–100 7C374iL–83 7C374iL–66 Min. Max. Min. Max. Min 500 500 500 ...
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... OUTPUT CLOCK Latched Input LATCHED INPUT LATCH ENABLE COMBINATORIAL OUTPUT LATCH ENABLE Latched Input and Output LATCHED INPUT LATCHED OUTPUT INPUT LATCH ENABLE OUTPUT LATCH ENABLE LATCH ENABLE Document #: 38-03031 Rev PDL ICOL t ICS t WH CY7C374i t IH ICO ICO PDLL Page ...
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... Ordering Information Speed (MHz) Ordering Code 125 CY7C374i–125AC CY7C374i–125JC 100 CY7C374i–100AC CY7C374i–100JC CY7C374i–100AI CY7C374i–100JI 83 CY7C374i–83AC CY7C374i–83JC CY7C374i–83AI CY7C374i–83JI CY7C374i–83GMB CY7C374i–83YMB CY7C374iL–83AC CY7C374iL–83JC Document #: 38-03031 Rev Package Name ...
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... Ordering Information Speed (MHz) Ordering Code 66 CY7C374i–66AC CY7C374i–66JC CY7C374i–66AI CY7C374i–66JI CY7C374i–66GMB CY7C374i–66YMB CY7C374iL–66AC CY7C374iL–66JC MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Parameter Subgroups CC1 Document #: 38-03031 Rev. *A Package Name Package Type A100 100-Pin Thin Quad Flat Pack ...
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... Package Diagrams Document #: 38-03031 Rev. *A 100-Pin Thin Plastic Quad Flat Pack (TQFP) A100 CY7C374i 51-85048-*B Page ...
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... Package Diagrams (continued) Document #: 38-03031 Rev. *A 84-Pin Grid Array (Cavity Up) G84 84-Lead Plastic Leaded Chip Carrier J83 CY7C374i 51-80015-*A 51-85006-*A Page ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 84-Pin Ceramic Leaded Chip Carrier Y84 CY7C374i 51-80095-*A Page ...
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... Document History Page Document Title: CY7C374i UltraLogic™ 128-Macrocell Flash CPLD Document Number: 38-03031 REV. ECN NO. Issue Date ** 106376 07/11/01 *A 213375 See ECN Document #: 38-03031 Rev. *A Orig. of Change SZV Changed from Spec number: 38-00496 to 38-03031 FSG Added note to title page: “Use Ultra37000 For All New Designs” ...