ADSP-2115KP-66 Analog Devices Inc, ADSP-2115KP-66 Datasheet - Page 15
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ADSP-2115KP-66
Manufacturer Part Number
ADSP-2115KP-66
Description
Manufacturer
Analog Devices Inc
Datasheet
1.ADSP-2115KP-66.pdf
(64 pages)
Specifications of ADSP-2115KP-66
Device Core Size
16b
Architecture
Enhanced Harvard
Format
Fixed Point
Clock Freq (max)
16.67MHz
Mips
16.67
Device Input Clock Speed
16.67MHz
Ram Size
1.5KB
Program Memory Size
Not RequiredKB
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
68
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
REV. B
Instruction Set
The ADSP-21xx assembly language uses an algebraic syntax for
ease of coding and readability. The sources and destinations of
computations and data movements are written explicitly in each
assembly statement, eliminating cryptic assembler mnemonics.
Every instruction assembles into a single 24-bit word and
executes in a single cycle. The instructions encompass a wide
variety of instruction types along with a high degree of
ALU Instructions
[IF cond] AR|AF
MAC Instructions
[IF cond] MR|MF = xop * yop ;
IF MV
Shifter Instructions
[IF cond] SR = [SR OR] ASHIFT xop ;
[IF cond] SR = [SR OR] LSHIFT xop ;
[IF cond] SE = EXP xop ;
[IF cond] SB = EXPADJ xop ;
[IF cond] SR = [SR OR] NORM xop ;
Data Move Instructions
reg = reg ;
reg = <data> ;
reg = DM (<addr>) ;
dreg = DM (Ix , My) ;
dreg = PM (Ix , My) ;
DM (<addr>) = reg ;
DM (Ix , My) = dreg ;
PM (Ix , My) = dreg ;
Multifunction Instructions
<ALU>|<MAC>|<SHIFT> , dreg = dreg ;
<ALU>|<MAC>|<SHIFT> , dreg = DM (Ix , My) ;
<ALU>|<MAC>|<SHIFT> , dreg = PM (Ix , My) ;
DM (Ix , My) = dreg , <ALU>|<MAC>|<SHIFT> ;
PM (Ix , My) = dreg , <ALU>|<MAC>|<SHIFT> ;
dreg = DM (Ix , My) , dreg = PM (Ix , My) ;
<ALU>|<MAC> , dreg = DM (Ix , My) , dreg = PM (Ix , My) ;
SAT MR ;
SR = [SR OR] ASHIFT xop BY <exp>;
SR = [SR OR] LSHIFT xop BY <exp>;
= xop + yop [+ C] ;
= xop – yop [+ C– 1] ;
= yop – xop [+ C– 1] ;
= xop AND yop ;
= xop OR yop ;
= xop XOR yop ;
= PASS xop ;
= – xop ;
= NOT xop ;
= ABS xop ;
= yop + 1 ;
= yop – 1 ;
= DIVS yop, xop ;
= DIVQ xop ;
= MR + xop * yop ;
= MR – xop * yop ;
= MR ;
= 0 ;
Add/Add with Carry
Subtract X – Y/Subtract X – Y with Borrow
Subtract Y – X/Subtract Y – X with Borrow
AND
OR
XOR
Pass, Clear
Negate
NOT
Absolute Value
Increment
Decrement
Divide
Multiply
Multiply/Accumulate
Multiply/Subtract
Transfer MR
Clear
Conditional MR Saturation
Arithmetic Shift
Logical Shift
Arithmetic Shift Immediate
Logical Shift Immediate
Derive Exponent
Block Exponent Adjust
Normalize
Register-to-Register Move
Load Register Immediate
Data Memory Read (Direct Address)
Data Memory Read (Indirect Address)
Program Memory Read (Indirect Address)
Data Memory Write (Direct Address)
Data Memory Write (Indirect Address)
Program Memory Write (Indirect Address)
–15–
operational parallelism. There are five basic categories of
instructions: data move instructions, computational instruc-
tions, multifunction instructions, program flow control instruc-
tions and miscellaneous instructions. Multifunction instructions
perform one or two data moves and a computation.
The instruction set is summarized below. The ADSP-2100
Family Users Manual contains a complete reference to the
instruction set.
Computation with Register-to-Register Move
Computation with Memory Read
Computation with Memory Read
Computation with Memory Write
Computation with Memory Write
Data & Program Memory Read
ALU/MAC with Data & Program Memory Read
ADSP-21xx