CY7C1399-15ZC Cypress Semiconductor Corp, CY7C1399-15ZC Datasheet

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CY7C1399-15ZC

Manufacturer Part Number
CY7C1399-15ZC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1399-15ZC

Density
256Kb
Access Time (max)
15ns
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP
Operating Temp Range
0C to 70C
Supply Current
55mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
28
Word Size
8b
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1399-15ZC
Manufacturer:
CYPRESS
Quantity:
259
Features
Functional Description
The CY7C1399 is a high-performance 3.3V CMOS Static RAM
organized as 32,768 words by 8 bits. Easy memory expansion
Selection Guide
Cypress Semiconductor Corporation
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby Current ( A)
Maximum CMOS Standby Current ( A) L
• Single 3.3V power supply
• Ideal for low-voltage cache memory applications
• High speed
• Low active power
• Low CMOS standby power (L)
• 2.0V data retention (L)
• Low-power alpha immune 6T cell
• Plastic SOJ and TSOP packaging
Logic Block Diagram
— 12/15 ns
— 255 mW (max.)
— 180 W (max.), f=f
— 40 W
CE
WE
OE
A
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
9
MAX
INPUT BUFFER
DECODER
32K x 8
COLUMN
ARRAY
7C1399–12
3901 North First Street
POWER
DOWN
500
12
60
50
7C1399–15
is provided by an active LOW Chip Enable (CE) and active
LOW Output Enable (OE) and three-state drivers. The device
has an automatic power-down feature, reducing the power
consumption by more than 95% when deselected.
An active LOW Write Enable signal (WE) controls the writing/
reading operation of the memory. When CE and WE inputs
are both LOW, data on the eight data input/output pins (I/O
through I/O
the address present on the address pins (A
Reading the device is accomplished by selecting the device
and enabling the outputs, CE and OE active LOW, while WE
remains inactive or HIGH. Under these conditions, the con-
tents of the location addressed by the information on address
pins is present on the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and Write Enable
(WE) is HIGH. The CY7C1399 is available in 28-pin standard
300-mil-wide SOJ and TSOP Type I packages.
500
15
55
50
C1399–1
7
San Jose
) is written into the memory location addressed by
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
32K x 8 3.3V Static RAM
7C1399–20
0
1
2
3
4
5
6
7
500
20
50
50
Pin Configurations
CA 95134
GND
7C1399–25
I/O
I/O
I/O
A
A
A
A
A
A
A
A
A
A
10
11
12
13
14
5
6
7
8
9
0
1
2
500
25
45
50
13
14
1
2
3
4
5
6
7
8
9
10
11
12
Top View
SOJ
CY7C1399
28
27
26
25
24
23
22
21
20
19
18
17
16
15
March 25, 1999
0
408-943-2600
I/O
7C1399–35
V
WE
A
A
A
A
OE
A
CE
I/O
I/O
I/O
I/O
through A
CC
4
3
2
1
0
C1399–2
3
7
6
5
4
500
35
40
50
14
).
0

Related parts for CY7C1399-15ZC

CY7C1399-15ZC Summary of contents

Page 1

... The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and Write Enable (WE) is HIGH. The CY7C1399 is available in 28-pin standard 300-mil-wide SOJ and TSOP Type I packages. I/O 0 ...

Page 2

... Output Disabled V = Max GND CC OUT V = Max mA, CC OUT 1/t MAX RC Max MAX L Max – 0.3V – 0.3V 0.3V – 0. 0.3V, CC f=f MAX 2 CY7C1399 GND C1399–3 Ambient Temperature +70 C 3.3V 300 mV – +85 C 3.3V 300 mV 7C1399–15 7C1399– ...

Page 3

... [3] V – 0.3V 0.3V –0. 0.3V, CC f=f MAX Description Test Conditions MHz 3.0V R2 GND 351 1.73V 3 CY7C1399 7C1399–25 7C1399–35 Min. Max. Min. Max. Unit 2.4 2.4 0.4 0.4 2 +0.3V +0.3V –0.3 0.8 –0.3 0.8 –1 +1 –1 +1 – ...

Page 4

... Operating Range) Conditions 2.0V > V – 0.3V > V – 0. < 0. less than less than t , and t HZCE LZCE HZOE LZOE and t HZWE SD 4 CY7C1399 7C1399–25 7C1399–35 Min. Max. Min. Max Min. Max. 2.0 200 less than t for any given device. ...

Page 5

... Notes: 10. Device is continuously selected HIGH for read cycle. 12. Address valid prior to or coincident with CE transition LOW. DATA RETENTION MODE 3. CDR OHA DOE DATA VALID 50 CY7C1399 3. C1399–5 DATA VALID C1399–6 t HZOE t HZCE HIGH IMPEDANCE t PD ICC 50% ISB C1399–7 ...

Page 6

... If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. 15. During this period, the I/Os are in the output state and input signals shold not be applied PWE t SD DATA VALID SCE DATA VALID IN [9, 14 DATA IN 6 CY7C1399 VALID t LZWE C1399–8 C1399–9 C1399–10 ...

Page 7

... CY7C1399–15ZC CY7C1399L–15ZC CY7C1399–15VI CY7C1399–15ZI CY7C1399L–15ZI 20 CY7C1399–20VC CY7C1399L–20VC CY7C1399–20ZC CY7C1399L–20ZC CY7C1399–20VI 25 CY7C1399–25VC CY7C1399L–25VC CY7C1399–25ZC CY7C1399L–25ZC 35 CY7C1399–35VC CY7C1399L–35VC CY7C1399–35ZC CY7C1399L–35ZC Document #: 38–00222–G Mode Deselect/Power-Down ...

Page 8

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 28-Lead (300-Mil) Molded SOJ V21 28-Lead Thin Small Outline Package Z28 CY7C1399 51-85031-B 51-85071-E ...

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