CAT25C64S-TE13 ON Semiconductor, CAT25C64S-TE13 Datasheet

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CAT25C64S-TE13

Manufacturer Part Number
CAT25C64S-TE13
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT25C64S-TE13

Density
64Kb
Interface Type
Serial (SPI)
Organization
8Kx8
Access Time (max)
250ns
Frequency (max)
3MHz
Write Protection
Yes
Data Retention
100Year
Operating Supply Voltage (typ)
3.3/5V
Package Type
SOIC
Operating Temp Range
0C to 70C
Supply Current
10mA
Operating Supply Voltage (min)
2.5V
Operating Supply Voltage (max)
6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / Rohs Status
Not Compliant
HOLD
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
CAT25C32/64
32K/64K-Bit SPI Serial CMOS EEPROM
DESCRIPTION
The CAT25C32/64 is a 32K/64K-Bit SPI Serial CMOS
EEPROM internally organized as 4Kx8/8Kx8 bits.
Catalyst’s advanced CMOS Technology substantially
reduces device power requirements. The CAT25C32/
64 features a 64-byte page write buffer. The device
operates via the SPI bus serial interface and is enabled
though a Chip Select (CS). In addition to the Chip Select,
the clock input (SCK), data in (SI) and data out (SO) are
BLOCK DIAGRAM
PIN CONFIGURATION
FEATURES
DIP Package (P, L, GL)
SCK
WP
SO
CS
V SS
SI
1.8 to 6.0 volt operation
Hardware and software protection
Low power CMOS technology
SPI modes (0,0 &1,1)
Commercial, industrial and automotive
temperature ranges
CS
SO
WP
10 MHz SPI compatible
1
2
3
4
REGISTER
CONTROL
PROTECT
CONTROL
STATUS
BLOCK
LOGIC
LOGIC
WORD ADDRESS
I/O
SPI
8
7
6
5
BUFFERS
V CC
HOLD
SCK
SI
XDEC
SHIFT REGISTERS
TIMING CONTROL
HIGH VOLTAGE/
SENSE AMPS
DECODERS
STORAGE
COLUMN
E
DATA IN
ARRAY
2
PROM
SOIC Package (S, V, GV)
V SS
WP
SO
CS
1
2
3
4
1
8
7
6
5
required to access the device. The HOLD pin may be
used to suspend any serial communication without
resetting the serial sequence. The CAT25C32/64 is
designed with software and hardware write protection
features including Block write protection. The device is
available in 8-pin DIP, 8-pin SOIC, 14-pin TSSOP and
20-pin TSSOP packages.
V CC
HOLD
SCK
SI
1,000,000 program/erase cycles
100 year data tetention
Self-timed write cycle
8-pin DIP/SOIC and 14-pin TSSOP
64-Byte page write buffer
Block write protection
– Protect 1/4, 1/2 or all of EEPROM array
PIN FUNCTIONS
Pin Name
SO
SCK
WP
V
V
CS
SI
HOLD
NC
CC
SS
TSSOP Package (U14, Y14)
Serial Data Output
Serial Clock
Write Protect
+1.8V to +6.0V Power Supply
Ground
Chip Select
Serial Data Input
Suspends Serial Input
No Connect
WP
V
CS
SO
NC
NC
NC
SS
1
2
3
4
6
7
5
Function
14
13
12
11
10
9
8
Doc. No. 1001, Rev. J
HOLD
NC
VCC
NC
NC
SCK
SI

Related parts for CAT25C64S-TE13

CAT25C64S-TE13 Summary of contents

Page 1

... Self-timed write cycle 8-pin DIP/SOIC and 14-pin TSSOP 64-Byte page write buffer Block write protection – Protect 1/4, 1/2 or all of EEPROM array required to access the device. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence. The CAT25C32/64 is designed with software and hardware write protection features including Block write protection ...

Page 2

CAT25C32/64 ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias ................. – +125 C Storage Temperature ....................... – +150 C Voltage on any Pin with 1) Respect to V ................... –2. with Respect to V ...

Page 3

PIN CAPACITANCE Applicable over recommended operating range from T Symbol Test Conditions C Output Capacitance (SO) OUT Input Capacitance (CS, SCK, SI, WP, HOLD A.C. CHARACTERISTICS SYMBOL PARAMETER t Data Setup Time SU t Data Hold Time ...

Page 4

CAT25C32/64 FUNCTIONAL DESCRIPTION The CAT25C32/64 supports the SPI bus data transmission protocol. The synchronous Serial Peripheral Interface (SPI) helps the CAT25C32/64 to interface directly with many of today’s popular microcontrollers. The CAT25C32/64 contains an 8-bit instruction register. (The instruction set ...

Page 5

Opcodes, byte addresses, or data present on the SI pin are latched on the rising edge of the SCK. Data on the SO pin is updated on the falling edge of the ...

Page 6

CAT25C32/64 STATUS REGISTER The Status Register indicates the status of the device. The RDY (Ready) bit indicates whether the CAT25C32 busy with a write operation. When set write cycle is in progress and when set ...

Page 7

READ Sequence The part is selected by pulling CS low. The 8-bit read instruction is transmitted to the CAT25C32/64, fol- lowed by the 16-bit address(the three Most Significant Bits are don’t care for 25C64 and four most significant bits are ...

Page 8

CAT25C32/64 Byte Write Once the device Write Enable state, the user may proceed with a write sequence by setting the CS low, issuing a write instruction via the SI line, followed by the 16-bit address (the three ...

Page 9

Access to the array during an internal write cycle is ignored and program-ming is continued. On power up high impedance. Figure 8. Page Write Instruction ...

Page 10

CAT25C32/64 ORDERING INFORMATION Prefix Device # 25C64 CAT Product Optional Number Company ID 25C32: 32K 25C64: 64K Package P: PDIP S: SOIC U14: 14-pin TSSOP L: PDIP (Lead free, Halogen free) V: SOIC, JEDEC (Lead free, Halogen free) Y14: 14-pin ...

Page 11

REVISION HISTORY Date Rev. Reason 8/4/2004 F Updated Features Updated DC Operating Characteristics table & notes 03/29/05 G Update Reliability Characteristics Update Instruction Set - Power-Up Timing 07/08/05 H Update Features Update Pin Configuation Update Ordering Information 09/22/05 I Update ...

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