HN58V65AFP-10 HITACHI, HN58V65AFP-10 Datasheet - Page 13

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HN58V65AFP-10

Manufacturer Part Number
HN58V65AFP-10
Description
Manufacturer
HITACHI
Datasheet

Specifications of HN58V65AFP-10

Lead Free Status / Rohs Status
Not Compliant

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HN58V65A Series, HN58V66A Series
Write Cycle 2 (4.5 V
Parameter
Address setup time
Address hold time
CE to write setup time (WE controlled)
CE hold time (WE controlled)
WE to write setup time (CE controlled)
WE hold time (CE controlled)
OE to write setup time
OE hold time
Data setup time
Data hold time
WE pulse width (WE controlled)
CE pulse width (CE controlled)
Data latch time
Byte load cycle
Byte load window
Write cycle time
Time to device busy
Write start time
Reset protect time*
Reset high time*
Notes: 1. t
Rev.3.00, Dec. 04.2003, page 11 of 26
2. This function is supported by only the HN58V66A series.
3. Use this device in longer cycle than this value.
4. t
5. Next read or write operation can be initiated after t
6. This parameter is sampled and not 100
7. A6 through A12 are page addresses and these addresses are latched at the first falling edge of
8. A6 through A12 are page addresses and these addresses are latched at the first falling edge of
9. See AC read characteristics.
are no longer driven.
automatically completes the internal write operation within this value.
WE.
CE.
DF
WC
and t
must be longer than this value unless polling techniques or RDY/Busy are used. This device
2, 6
DFR
2
are defined as the time at which the outputs achieve the open circuit conditions and
V
CC
5.5 V)
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AS
AH
CS
CH
WS
WH
OES
OEH
DS
DH
WP
CW
DL
BLC
BL
WC
DB
DW
RP
RES
tested.
Min*
0
50
0
0
0
0
0
0
50
0
100
100
50
0.2
100
120
0*
100
1
DW
5
if polling techniques or RDY/Busy are used.
3
Typ
Max
30
10*
4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
s
s
s
s
Test conditions

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