CAT93C46SI-TE13 ON Semiconductor, CAT93C46SI-TE13 Datasheet

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CAT93C46SI-TE13

Manufacturer Part Number
CAT93C46SI-TE13
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT93C46SI-TE13

Density
1Kb
Interface Type
Serial (Microwire)
Organization
128x8/64x16
Access Time (max)
500ns
Frequency (max)
500KHz
Write Protection
Yes
Data Retention
100Year
Operating Supply Voltage (typ)
3.3/5V
Package Type
SOIC N
Operating Temp Range
-40C to 85C
Supply Current
3mA
Operating Supply Voltage (min)
2.5V
Operating Supply Voltage (max)
6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / Rohs Status
Not Compliant

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CAT93C46
1K-Bit Microwire Serial EEPROM
CAT93C46 Die Revision H not recommended for new designs. See CAT93HC46 data sheet.
FEATURES
DESCRIPTION
The CAT93C46 is a 1K-bit Serial EEPROM memory
device which is configured as either registers of 16 bits
(ORG pin at V
register can be written (or read) serially by using the
DI (or DO) pin. The CAT93C46 is manufactured using
PIN CONFIGURATION
© 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice.
DO
CS
SK
DO
SOIC Package (S,V)
CS
SK
DI
DIP Package (P, L)
DI
High speed operation: 1MHz
Low power CMOS technology
1.8 to 6.0 volt operation
Selectable x8 or x16 memory organization
Self-timed write cycle with auto-clear
Hardware and software write protection
1
2
3
4
1
2
3
4
DO
CS
SK
DI
TDFN Package (RD4, ZD4)
8
7
6
5
8
7
6
5
CC
TSSOP Package (U,Y)
1
2
3
4
ORG
GND
V CC
) or 8 bits (ORG pin at GND). Each
NC
V CC
NC
ORG
GND
V CC
ORG
GND
NC
Bottom View
8
7
6
5
(Die Rev. H)
V CC
DO
CS
SK
DI
NC
CS
SK
SOIC Package (J,W)
SOIC Package (K,X)
1
2
3
4
CS
SK
DI
DO
8
7
6
5
1
2
3
4
1
2
3
4
NC
V CC
ORG
GND
8
7
6
5
8
7
6
5
ORG
GND
DO
DI
V CC
ORG
GND
NC
FUNCTIONAL SYMBOL
PIN FUNCTIONS
Note: When the ORG pin is connected to VCC, the x16 organiza-
tion is selected. When it is connected to ground, the x8 pin is
selected. If the ORG pin is left unconnected, then an internal pullup
device will select the x16 organization.
Catalyst’s advanced CMOS EEPROM floating gate
technology. The device is designed to endure 1,000,000
program/erase cycles and has a data retention of 100
years. The device is available in 8-pin DIP, 8-pin SOIC,
8-pin TSSOP and 8-pad TDFN packages.
Power-up inadvertant write protection
1,000,000 Program/erase cycles
100 year data retention
Commercial, industrial and automotive
temperature ranges
“Green” package option available
Pin Name
CS
SK
DI
DO
V
GND
ORG
NC
CC
ORG
CS
NC
SK
Chip Select
Clock Input
Serial Data Input
Serial Data Output
+1.8 to 6.0V Power Supply
Ground
Memory Organization
No Connection
Function
GND
V
CC
Doc. No. 1087, Rev. L
DI
DO
TM

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CAT93C46SI-TE13 Summary of contents

Page 1

... Self-timed write cycle with auto-clear ■ Hardware and software write protection DESCRIPTION The CAT93C46 is a 1K-bit Serial EEPROM memory device which is configured as either registers of 16 bits (ORG pin bits (ORG pin at GND). Each CC register can be written (or read) serially by using the DI (or DO) pin ...

Page 2

ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias .................. -55°C to +125°C Storage Temperature ........................ -65°C to +150°C Voltage on any Pin with (1) Respect to Ground ............. -2. with Respect to Ground ................ -2.0V to +7.0V CC Package ...

Page 3

PIN CAPACITANCE Symbol Test (1) C Output Capacitance (DO) OUT (1) C Input Capacitance (CS, SK, DI, ORG) IN INSTRUCTION SET ...

Page 4

POWER-UP TIMING Symbol Parameter t Power-up to Read Operation PUR t Power-up to Write Operation PUW A.C. TEST CONDITIONS ≤ 50ns Input Rise and Fall Times Input Pulse Voltages Timing Reference Voltages Input Pulse Voltages Timing Reference Voltages NOTE: ...

Page 5

Figure 1. Sychronous Data Timing SK VALID DI t CSS CS DO Figure 2. Read Instruction Timing HIGH-Z DO Figure 3. Write Instruction Timing ...

Page 6

Erase Upon receiving an ERASE command and address, the CS (Chip Select) pin must be deasserted for a minimum The falling edge of CS will start the self clocking CSMIN clear cycle of the selected memory location. ...

Page 7

Figure 5. EWEN/EWDS Instruction Timing ENABLE=11 Figure 6. ERAL Instruction Timing HIGH-Z DO Figure 7. WRAL Instruction Timing ...

Page 8

ORDERING INFORMATION Prefix Device # CAT 93C46 Optional Product Company ID Number Package P = PDIP S = SOIC (JEDEC SOIC (JEDEC SOIC (EIAJ TSSOP RD4 = TDFN (3x3mm) ZD4 = TDFN (3x3mm, Lead ...

Page 9

REVISION HISTORY ...

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