AM29LV800DB-70EI Spansion Inc., AM29LV800DB-70EI Datasheet
AM29LV800DB-70EI
Specifications of AM29LV800DB-70EI
Related parts for AM29LV800DB-70EI
AM29LV800DB-70EI Summary of contents
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Am29LV800D Data Sheet This product has been retired and is not recommended for designs. For new and current designs, S29AL008D supersedes Am29LV800D and is the factory-recommended migration path for this device. Please refer to the S29AL008D data sheet for specifications ...
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... Am29LV800D 8 Megabit ( 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory This product has been retired and is not recommended for designs. For new and current designs, S29AL008D supersedes Am29LV800D and is the factory-recommended migration path for this device. Please refer to the S29AL008D data sheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. ...
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... The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the system micropro- cessor to read the boot-up firmware from the Flash memory. The device offers two power-saving features. When addresses have been stable for a specified amount of time, the device enters the automatic sleep mode ...
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... Program and Erase Operation Status .................. 10 Standby Mode ...................................................... 10 Automatic Sleep Mode ......................................... 10 RESET#: Hardware Reset Pin ............................. 10 Output Disable Mode ............................................ 11 Table 2. Am29LV800DT Top Boot Block Sector Addresses ........................................................11 Table 3. Am29LV800DB Bottom Boot Block Sector Addresses ........................................................12 Autoselect Mode ................................................... 12 Table 4. Am29LV800D Autoselect Codes (High Voltage Method) ................................................13 Sector Protection/Unprotection ............................ 13 Temporary Sector Unprotect ................................ 13 Figure 1 ...
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PRODUCT SELECTOR GUIDE Family Part Number Speed Options Full Voltage Range: V Max access time ACC Max CE# access time Max OE# access time Note: See “AC Characteristics” for ...
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CONNECTION DIAGRAMS A15 1 A14 2 A13 3 A12 4 A11 5 6 A10 WE# 11 RESET RY/BY# 15 A18 16 A17 ...
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... A18 NC DQ2 DQ10 DQ0 DQ8 CE# Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compro- mised if the package body is exposed to temperatures above 150°C for prolonged periods of time. Am29LV800D DQ13 DQ6 DQ4 CC G3 ...
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PIN CONFIGURATION A0–A18 = 19 addresses DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1 = DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) BYTE# = Selects 8-bit or 16-bit mode CE# = Chip enable OE# = Output enable WE# ...
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... Bottom sector Valid Combinations for FBGA Packages Order Number AM29LV800DT-70, AM29LV800DB-70 AM29LV800DT-90, AM29LV800DB-90 AM29LV800DT-120, AM29LV800DB-120 Valid Combinations list configurations planned to be sup- ported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations. ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is composed of ...
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... V but not within greater. The RESET# pin may be tied to the system reset cir- cuitry. A system reset would thus also reset the Flash memory, enabling the system to read the boot-up firm- ware from the Flash memory. Am29LV800D Am29LV800D_00_A7 December 4, 2006 ± 0.3 V. ...
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If RESET# is asserted during a program or erase op- eration, the RY/BY# pin remains a “0” (busy) until the internal reset operation is complete, which requires a time of t (during Embedded Algorithms). The sys- READY tem can thus ...
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... Table 3. Am29LV800DB Bottom Boot Block Sector Addresses Sector A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 Note for Tables 2 and 3: Address range is A18:A-1 in byte mode and A18:A0 in word mode. See “Word/Byte Configuration” ...
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... The alternate method intended only for programming equipment requires V on address pin A9 and OE#. ID This method is compatible with programmer routines written for earlier 3.0 volt-only AMD flash devices. Publication number 20536 contains further details; contact an AMD representative to request a copy. Am29LV800D_00_A7 December 4, 2006 ...
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START PLSCNT = 1 RESET Wait First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with ...
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Hardware Data Protection The command sequence requirement of unlock cycles for programming or erasing provides data protection against inadvertent writes (refer to Table 5 for com- mand definitions). In addition, the following hardware data protection measures prevent accidental erasure or ...
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Table 5 shows the address and data require- ments. This method is an alternative to that shown in Table 4, which is intended for PROM programmers and requires V ...
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Write Program Command Sequence Data Poll from System Embedded Program algorithm in progress Verify Data? No Increment Address Last Address? Programming Completed Note: See Table 5 for program command sequence. Figure 3. Program Operation Chip Erase Command Sequence Chip erase ...
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Once the sector erase operation has begun, only the Erase Suspend command is valid. All other com- mands are ignored. Note that a hardware reset dur- ing the sector erase operation immediately terminates the operation. The Sector Erase command sequence ...
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Table 5. Am29LV800D Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte Word Sector ...
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WRITE OPERATION STATUS The device provides several bits to determine the sta- tus of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 6 and the following subsections describe the functions of these bits. DQ7, RY/BY#, and DQ6 ...
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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...
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still toggling, the de- vice did not completed the operation successfully, and the system must write the reset command to return to reading array data. The remaining scenario is that the system initially ...
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Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...
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DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Notes Active Write Current CC I CC2 (Notes ...
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... DC CHARACTERISTICS (Continued) Zero Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 Note ° 1500 2000 2500 Time Frequency in MHz Figure 10. Typical I vs. Frequency CC1 Am29LV800D 3000 3500 4000 3 ...
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TEST CONDITIONS Device Under Test C 6.2 kΩ L Note: Diodes are IN3064 or equivalent Figure 11. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Am29LV800D_00_A7 December 4, 2006 ...
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AC CHARACTERISTICS Read Operations Parameter JEDEC Std t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output Delay ...
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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded t READY Algorithms) to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...
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AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# BYTE# ...
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AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH Data ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE Data RY/BY VCS Notes program address program data Illustration ...
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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data 55h RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid ...
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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...
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AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use CE# or OE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector. Temporary Sector ...
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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# * For sector protect For sector unprotect ...
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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH DS ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes program address program data, DQ7# = complement of the data written ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 3) Word Mode Notes: 1. Typical program and erase times assume the following conditions: 25 programming typicals ...
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PHYSICAL DIMENSIONS* TS 048—48-Pin Standard TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering Am29LV800D Am29LV800D_00_A7 December 4, 2006 Dwg rev AA; 10/99 ...
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PHYSICAL DIMENSIONS FBB 048—48-Ball Fine-Pitch Ball Grid Array (FBGA Am29LV800D_00_A7 December 4, 2006 Am29LV800D Dwg rev AF; 10/99 41 ...
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PHYSICAL DIMENSIONS VBK 048 - 48 Ball Fine-Pitch Ball Grid Array (FBGA) 6. INDEX MARK PIN A1 CORNER 10 TOP VIEW A SEATING PLANE A1 SIDE VIEW PACKAGE VBK 048 JEDEC N/A 6. 8.15 ...
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PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package Am29LV800D_00_A7 December 4, 2006 Am29LV800D Dwg rev AC; 10/99 43 ...
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... Please note that Spansion Inc. will not be liable to you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure ...